Abstract: A semiconductor device according to an embodiment of the present invention includes: a gate electrode; a gate insulating layer; a metal oxide layer containing aluminum as a main component above the gate insulating layer; an oxide semiconductor layer having a polycrystalline structure above the metal oxide layer; a source electrode and a drain electrode contacting the oxide semiconductor layer from above the oxide semiconductor layer; and an insulating layer above the source electrode and the drain electrode, wherein a linear mobility of the semiconductor device is larger than 20 cm2/Vs when (Vg?Vth)×Cox=5×10?7 C/cm2, in the case where the Vg is a voltage supplied to the gate electrode, the Vth is a threshold voltage of the semiconductor device, and the Cox is an electrostatic capacitance of the gate insulating layer sandwiched by the gate electrode and the oxide semiconductor layer.

Abstract: A semiconductor device includes a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer having a polycrystalline structure over the gate insulating layer, a source electrode and a drain electrode over the oxide semiconductor layer, and an interlayer insulating layer in contact with the oxide semiconductor layer, the interlayer insulating layer covering the source electrode and the drain electrode. The oxide semiconductor layer includes a first region overlapping one of the source electrode and the drain electrode and a second region in contact with the interlayer insulating layer. A difference between a thickness of the first region and a thickness of the second region is less than or equal to 1 nm.

Abstract: A semiconductor device includes a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer having a polycrystalline structure over the gate insulating layer, a source electrode and a drain electrode over the oxide semiconductor layer, and an interlayer insulating layer in contact with the oxide semiconductor layer. The interlayer insulating layer covers the source electrode and the drain electrode. The oxide semiconductor layer includes a first region overlapping one of the source electrode and the drain electrode and a second region in contact with the interlayer insulating layer. A difference between a film thickness of the first region and a film thickness of the second region is less than or equal to 5 nm.

Abstract: A semiconductor device comprises a first insulating layer; a metal oxide layer mainly composed of aluminum on the first insulating layer; an oxide semiconductor layer having a polycrystalline structure on the metal oxide layer; a gate insulating layer on the oxide semiconductor layer; a gate electrode on the gate insulating layer; and a second insulating layer on the gate electrode. The metal oxide layer and the oxide semiconductor layer are both patterned, and the oxide semiconductor layer has a first region in contact with the gate insulating layer and a second region continuous with the first region in a first direction and in contact with the gate insulating layer and the second insulating layer.

Abstract: In a method for producing a composition containing an electrolyte, a non-aqueous solvent, and an anionic component, the electrolyte contains a sulfonylimide compound represented by the general formula (1), and the anionic component contains a conjugate acid with an acid dissociation constant pKa (a first-step acid dissociation constant pKa1 for acids that ionize multiple times) of 0 or more and 6.5 or less and is contained at a concentration of 10000 ppm by mass or less with respect to the electrolyte. The method includes dehydrating of adding the anionic component to a solution containing the electrolyte and the non-aqueous solvent to dehydrate the solution for solvent replacement. LiN (XSO2) (FSO2) (1) (where X represents a fluorine atom, an alkyl group with 1 to 6 carbon atoms, or a fluoroalkyl group with 1 to 6 carbon atoms).

Abstract: A semiconductor device includes a gate electrode, a gate insulating layer over the gate electrode, a metal oxide layer over the gate insulating layer, an oxide semiconductor layer having a polycrystalline structure over the metal oxide layer, a source electrode and a drain electrode over the oxide semiconductor layer, and an interlayer insulating layer in contact with the oxide semiconductor layer, the interlayer insulating layer covering the source electrode and the drain electrode, wherein the oxide semiconductor layer includes a first region overlapping one of the source electrode and the drain electrode and a second region in contact with the interlayer insulating layer, and a difference between a thickness of the first region and a thickness of the second region is 5 nm or less.

Abstract: A semiconductor device comprises a metal oxide layer on an insulating surface; an oxide semiconductor layer on the metal oxide layer; a gate insulating layer on the oxide semiconductor layer; and a gate wiring on the gate insulating layer. The metal oxide layer has a first region overlapping the gate wiring and the oxide semiconductor layer, a second region overlapping the oxide semiconductor layer and not overlapping the gate wiring, and a third region overlapping the gate wiring and not overlapping the oxide semiconductor layer.

Abstract: A semiconductor device according to an embodiment includes: a first gate electrode; a first insulating layer on the first gate electrode; an oxide semiconductor layer on the first insulating layer; a second insulating layer on the oxide semiconductor layer; and a second gate electrode on the second insulating layer. The first insulating layer includes a first layer including silicon and nitrogen, a second layer including silicon and oxygen, and a third layer including aluminum and oxygen. A thickness of the first layer is 10 nm or more and 190 nm or less. A thickness of the second layer is 10 nm or more and 100 nm or less. A total thickness of the first layer and the second layer is 200 nm or less. A thickness of the third layer 1 nm or more and 10 nm or less.

Abstract: A semiconductor device includes an oxide semiconductor layer including a polycrystalline structure, a gate electrode facing the oxide semiconductor layer, a gate insulating layer between the oxide semiconductor layer and the gate electrode, a first transparent conductive layer connected to the oxide semiconductor layer, and a second transparent conductive layer arranged in the same layer as the first transparent conductive layer and separated from the first transparent conductive layer, wherein crystallizability of the first transparent conductive layer is different from crystallizability of the second transparent conductive layer.

Abstract: A method for manufacturing a solar cell, including the steps of: forming unevenness on both of main surfaces of a semiconductor substrate of a first conductivity type; forming a base layer on a first main surface of the semiconductor substrate; forming a diffusion mask on the base layer; removing the diffusion mask in a pattern; forming an emitter layer on the portion of the first main surface where the diffusion mask have been removed; removing the remaining diffusion mask; forming a dielectric film on the first main surface; forming a base electrode on the base layer; and forming an emitter electrode on the emitter layer. This provides a method for manufacturing a solar cell that can bring high photoelectric conversion efficiency while decreasing the number of steps.

Abstract: An electrolyte composition includes: a sulfonylimide compound represented by the following general formula (1) as an electrolyte salt; and an amidosulfuric acid component. LiN(X1SO2)(X2SO2)??(1) (where X1 and X2 are identical to or different from each other, and each represent a fluorine atom, an alkyl group with a carbon number of 1 to 6, or a fluoroalkyl group with a carbon number of 1 to 6).