Abstract: A semiconductor memory device includes: a memory cell constituted by MOSFETs; a bit line for transmitting a writing and a reading information to or from the memory cell therethrough; a writing-in control signal line for controlling the writing operation onto the memory cell; a first conductive type MOSFET with a source thereof being connected to a power supply terminal, with a gate thereof being connected to the writing-in control signal line, and with a drain thereof being connected to the bit line; the first conductive type MOSFET being adapted to charge up the bit line when no writing is performed in the memory cell; a second conductive type MOSFET with first control line thereof being connected to the bit line, with a gate thereof being connected to the writing-in control signal line, and with a second control line thereof being connected to the output terminal of the writing circuit; and the second conductive type MOSFET being adapted to transmit to the bit line an output from the writing circuit.

Abstract: A semiconductor memory device, which comprises: a memory cell constituted by MOSFETs; a bit line for transmitting a writing and a reading information to the memory cell therethrough; a writing-in control signal line for controlling the writing operation onto the memory cell; and a writing circuit for transmitting the writing information input from the outside to the bit line at the time of writing but raising the voltage of the bit line up to a power supply voltage at the time of non-writing.