Abstract: A wiring substrate includes a first terminal, a second terminal disposed side by side at intervals from the first terminal in a first direction, a third terminal disposed side by side at intervals from the first terminal in the first direction on a side opposite to the second terminal, a first wiring positioned between the first terminal and the second terminal, a second wiring connected to the first terminal and the third terminal, and an insulating portion disposed on an upper layer side of the first terminal, the second terminal, the third terminal, the first wiring, and the second wiring, in which the third terminal is disposed at a position where an interval between the third terminal and the first terminal is longer than any of an interval between the first wiring and the first terminal, and an interval between the first wiring and the second terminal.

Abstract: An array substrate has a display area and a non-display area, the array substrate includes: a plurality of first lines; a plurality of second lines in the display area; an inspection switching element; a plurality of third lines being connected to either a source electrode or a drain electrode; a plurality of inspection lines being connected respectively to the plurality of third lines; and a dummy line in the non-display area, wherein at least one of the plurality of inspection lines and the dummy line overlap the plurality of third lines with a first insulation film intervening therebetween in such a manner, and overlapping regions where the dummy line overlaps the plurality of third lines are closer to the outer peripheral portion of the non-display area than are overlapping regions where the plurality of inspection lines overlap the plurality of third lines.

Abstract: The present invention relates to a liquid crystal display device including: a plurality of gate bus lines arranged on a substrate; a plurality of source bus lines crossing the gate bus lines; and a pixel electrode arranged in a pixel region surrounded by the gate bus lines and the source bus lines, the pixel electrode including a linear first electrode portion arranged along the gate bus lines in a plan view and a plurality of linear second electrode portions that are electrically connected to the first electrode portion and are parallel to each other, at least one slit between the plurality of linear second electrode portions being open on a source bus line side.

Abstract: An active matrix substrate includes first and second gate bus lines each extending in a first direction; first and second source bus lines each extending in a second direction; a pixel electrode; and an auxiliary capacitance bus line. The conductive line branch portions of the auxiliary capacitance bus line include a first conductive line branch portion extending in the second direction, a second conductive line branch portion extending in a direction opposite to the first conductive line branch portion, a third conductive line branch portion extending in the second direction, and a fourth conductive line branch portion extending in a direction opposite to the third conductive line branch portion. In the first direction, one of the first and second conductive line branch portions has a longer length than the other, and one of the third and fourth conductive line branch portions has a longer length than the other.

Abstract: An active matrix substrate includes first and second gate bus lines each extending in a first direction; first and second source bus lines each extending in a second direction; a pixel electrode; and an auxiliary capacitance bus line. The conductive line branch portions of the auxiliary capacitance bus line include a first conductive line branch portion extending in the second direction, a second conductive line branch portion extending in a direction opposite to the first conductive line branch portion, a third conductive line branch portion extending in the second direction, and a fourth conductive line branch portion extending in a direction opposite to the third conductive line branch portion. In the first direction, one of the first and second conductive line branch portions has a longer length than the other, and one of the third and fourth conductive line branch portions has a longer length than the other.

Abstract: The present invention provides a circuit substrate exhibiting an excellent transmittance and being capable of suitably repair broken conductive lines; and a display device.

Abstract: In an active matrix substrate, each of at least two auxiliary capacitance electrodes contains a first electrode section and a second electrode section, at least a portion of the first electrode sections and at least a portion of a plurality of source bus lines overlap each other, the second electrode section has two linear sections that branch from the first electrode section and that extend in a second direction, a portion of the region between the two linear sections and at least a portion of the plurality of source bus lines overlap each other, and the first and second electrode sections, which are adjacent and arranged in a first direction, are disposed symmetrically to each other about a reference point that is on a straight line passing through a substantially central portion of respective pixels arranged in the first direction.

Abstract: An active matrix substrate (10) includes a first line (101), a second line (102), a third line (103), a fourth line (104) and a fifth line (105) provided in a non-display region F. The first line crosses a non-input-side end portion of at least one bus line of a first bus line group with an insulating layer interposed therebetween. The second line crosses a non-input-side end portion of at least one bus line of a second bus line group with an insulating layer interposed therebetween. The third line crosses an input-side end portion of the first bus line group with an insulating layer interposed therebetween, and does not cross the second bus line group. The fourth line crosses an input-side end portion of the second bus line group with an insulating layer interposed therebetween, and does not cross the first bus line group. The fifth line is routed so as to cross the first, second, third and fourth lines with an insulating layer interposed therebetween.

Abstract: In an active matrix substrate, each of at least two auxiliary capacitance electrodes contains a first electrode section and a second electrode section, at least a portion of the first electrode sections and at least a portion of a plurality of source bus lines overlap each other, the second electrode section has two linear sections that branch from the first electrode section and that extend in a second direction, a portion of the region between the two linear sections and at least a portion of the plurality of source bus lines overlap each other, and the first and second electrode sections, which are adjacent and arranged in a first direction, are disposed symmetrically to each other about a reference point that is on a straight line passing through a substantially central portion of respective pixels arranged in the first direction.

Abstract: In an active matrix substrate, each of a plurality of auxiliary capacitance electrodes contain a first electrode section and a second electrode section, at least a portion of the first electrode sections and at least a portion of a plurality of source bus lines overlap each other, the second electrode section has two linear sections that branch from the first electrode section and that extend in a second direction, a portion of the region between the two linear sections and at least a portion of the plurality of source bus lines overlap each other, and the first and second electrode sections, which are adjacent and arranged in a first direction, are disposed symmetrically to each other about a reference point that is on a straight line passing through a substantially central portion of respective pixels arranged in the first direction.

Abstract: A method of manufacturing an array substrate 20 according to the present invention includes a line forming step, and line forming step includes following performances. A plurality of source lines 27 are formed on a glass substrate GS so as to extend from a first region A1 on the glass substrate GS to a second region A2 that is adjacent to the first region on an outer side thereof. A plurality of source driver side check lines 45A are formed on the glass substrate GS so as to extend from the second region A2 to a third region that is adjacent to the first region A1 on an outer side thereof and adjacent to the second region A2. A plurality of first line connection portions 49 are formed in the second region A2 and the first line connection portions 49 connect the source lines 27 and the first source driver side check lines 45A. A capacity stem line 43 and a common line 44 are formed to extend from the first region A1 to the third region A3.

Abstract: In an active matrix substrate, each of a plurality of auxiliary capacitance electrodes contain a first electrode section and a second electrode section, at least a portion of the first electrode sections and at least a portion of a plurality of source bus lines overlap each other, the second electrode section has two linear sections that branch from the first electrode section and that extend in a second direction, a portion of the region between the two linear sections and at least a portion of the plurality of source bus lines overlap each other, and the first and second electrode sections, which are adjacent and arranged in a first direction, are disposed symmetrically to each other about a reference point that is on a straight line passing through a substantially central portion of respective pixels arranged in the first direction.

Abstract: An active matrix substrate (10) includes a first line (101), a second line (102), a third line (103), a fourth line (104) and a fifth line (105) provided in a non-display region F. The first line crosses a non-input-side end portion of at least one bus line of a first bus line group with an insulating layer interposed therebetween. The second line crosses a non-input-side end portion of at least one bus line of a second bus line group with an insulating layer interposed therebetween. The third line crosses an input-side end portion of the first bus line group with an insulating layer interposed therebetween, and does not cross the second bus line group. The fourth line crosses an input-side end portion of the second bus line group with an insulating layer interposed therebetween, and does not cross the first bus line group. The fifth line is routed so as to cross the first, second, third and fourth lines with an insulating layer interposed therebetween.

Abstract: A circuit board includes: a plurality of first wires and a plurality of second wires intersecting with the first wires; a thin-film transistor element; a plurality of pixel electrodes electrically connected to the drain electrodes of the thin-film transistor element; and a patterned film. In a planar view of the principal surface of the circuit board, two of the plurality of first wires extend parallel to each other between pixels, and the patterned film has a linear portion extending along the first wires between the mutually extending two first wires, wherein the pattern film is provided in the same layer as the second wiring lines.

Abstract: The present invention provides a circuit substrate exhibiting an excellent transmittance and being capable of suitably repair broken conductive lines; and a display device.

Abstract: Picture element electrodes (7) are electrically connected with drain electrodes (18D) of respective transistor elements (18). The picture element electrodes (7) and data signal lines (SLn, SLn+1, . . . ) are provided above scanning signal lines (GLn, GLn+1, . . . ). The picture element electrodes (7) overlap scanning signal lines (GLn, GLn+1, . . . ) when viewed from above. Notch parts 7a and 7b are provided in each picture element electrode (7) so as to overlap each of the scanning signal lines (GLn, GLn+1, . . . ). Shield electrodes (4a, 4b) are formed in the same layer as the data signal lines (SLn, SLn+1, . . . ). Each of the scanning signal lines (GLn, GLn+1, . . . ) at least partially overlaps the shield electrodes (4a, 4b) in the notch parts (7a, 7b), when viewed from above. This provides the liquid crystal display panel having wide viewing angle characteristic and carrying out high quality display.

Abstract: The purpose of the present invention is to provide a circuit board and a display device wherein a patterned film is disposed in a manner that can sufficiently reduce the increase in capacitance and sufficiently minimize the degradation of display quality due to signal delay, while sufficiently shielding the lost part of a light shielding member with the patterned film. The present invention provides a circuit board used for a display device in which pixels are used to make an image. The circuit board comprises: a plurality of first wires and a plurality of second wires intersecting with the first wires; a thin-film transistor element; a plurality of pixel electrodes electrically connected to the drain electrodes of the thin-film transistor element; and a patterned film.

Abstract: A liquid crystal display panel includes a color filter substrate with four or more color layers of different colors and a light shielding layer, each pixel including a repeating unit composed of the four or more color layers overlap overlapping the light shielding layer, the liquid crystal display panel having a region where color layers of the same color in different pixels are arranged in the same rows or the same columns, and a color layer of a color with higher brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color with an overlapping width smaller than that with which a color layer of a color with lower brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color.

Abstract: A method of manufacturing an array substrate 20 according to the present invention includes a line forming step, and line forming step includes following performances. A plurality of source lines 27 are formed on a glass substrate GS so as to extend from a first region A1 on the glass substrate GS to a second region A2 that is adjacent to the first region on an outer side thereof. A plurality of source driver side check lines 45A are formed on the glass substrate GS so as to extend from the second region A2 to a third region that is adjacent to the first region A1 on an outer side thereof and adjacent to the second region A2. A plurality of first line connection portions 49 are formed in the second region A2 and the first line connection portions 49 connect the source lines 27 and the first source driver side check lines 45A. A capacity stem line 43 and a common line 44 are formed to extend from the first region A1 to the third region A3.

Abstract: In a display element (10), first and second sub-picture elements share a first signal line (S(i)) in common, third and fourth sub-picture elements share a second signal line (S(i+1)) in common, fifth and sixth sub-picture elements share a third signal line (S(i+2)) in common, the first, third, and fifth sub-picture elements are provided on one sides of the corresponding signal lines, and the second, fourth, and sixth sub-picture elements are provided on the other sides of the corresponding signal lines, and respective switching elements of two sub-picture elements displaying a primary color with the highest luminance out of the first through sixth sub-picture elements when the first through sixth sub-picture elements display an achromatic color are connected with one of a first scanning line (Ga(j)) and a second scanning line (Gb(j)).