Patents by Inventor Ryoichi Inada

Ryoichi Inada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190187219
    Abstract: To carry out diagnosis of a current sensor while maintaining high reliability. An inverter control device according to the present invention controls an inverter circuit, calculates an estimated direct current value on the basis of a duty value and an alternating current sensor value output by an alternating current sensor, and performs diagnosis of a direct current sensor on the basis of the estimated direct current value and a direct current sensor value output by the direct current sensor.
    Type: Application
    Filed: April 11, 2017
    Publication date: June 20, 2019
    Inventors: Ryoichi INADA, Teppei HIROTSU, Satoru SHIGETA
  • Publication number: 20190103863
    Abstract: An object of the present invention is to diagnose an abnormality detecting circuit that detects an abnormality, such as an overcurrent of a power semiconductor, with the number of insulating elements to be additionally provided, inhibited from increasing. There are provided: a drive circuit configured to output a gate signal to a power semiconductor; an abnormality detecting circuit configured to detect an abnormality of the power semiconductor; and a diagnosis signal applying circuit configured to apply a diagnosis signal to the abnormality detecting circuit. The diagnosis signal applying circuit applies the diagnosis signal, on the basis of the gate signal output by the drive circuit.
    Type: Application
    Filed: July 6, 2016
    Publication date: April 4, 2019
    Inventors: Ryoichi INADA, Teppei HIROTSU, Hideyuki SAKAMOTO, Kouichi YAHATA, Keiji KADOTA
  • Patent number: 9026892
    Abstract: A storage device includes a nonvolatile memory, a volatile memory, and a memory controller. The volatile memory includes a free block management table, and a worn block management table. If the number of free blocks is equal to or larger than a threshold value 1, and errors of the number of equal to or larger than a threshold value 2 but smaller than a threshold value 3 are included in the data read from the nonvolatile memory, the memory controller registers the block in the worn block management table as a worn block. If the number of free blocks becomes smaller than the threshold value 1, the memory controller registers the worn block registered in the worn block management table in the free block management table as the free block.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: May 5, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Ryoichi Inada, Ryo Fujita, Yuzuru Takahashi
  • Patent number: 8949515
    Abstract: Disclosed is a storage device using non-volatile semiconductor memory that achieves high performance and long life for the device. When managing the non-volatile semiconductor memory (2), physical blocks are classified into three types: scratch blocks (22), data blocks (23), and erased blocks (24). Data writing from a host device (3) is performed on the scratch blocks. When the number of empty pages within a scratch block becomes less than a predetermined number or no longer exists, the block is treated thereafter as a data block, and one of the erased blocks is newly assigned as a scratch block. If there are insufficient erased blocks, a block with relatively less valid data is selected from among the data blocks. After copying all valid data included in the block to a scratch block, the block is erased, and thus an erased block is acquired.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: February 3, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Nishi, Ryo Fujita, Ryoichi Inada, Takuma Nishimura, Masahiro Shiraishi, Koji Matsuda
  • Patent number: 8909870
    Abstract: A storage device includes a non-volatile memory, a cache memory and a memory controller. The non-volatile memory stores a logical-to-physical address translation table for managing partitioned data and storage locations thereof. The cache memory stores a data cache and a logical-to-physical address translation table cache which holds a portion of the logical-to-physical address translation table. When the memory controller receives a data read-out request from outside, in the case no empty entry is found in the data cache, among the partitioned data in the data cache, it creates an empty entry to read out the data thereto by evacuating partitioned data of which entries in the logical-to-physical address translation table exist in the logical-to-physical address translation table cache into the non-volatile memory prior to other partitioned data.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: December 9, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Ryoichi Inada, Ryo Fujita, Takuma Nishimura
  • Publication number: 20130275836
    Abstract: A storage device includes a nonvolatile memory, a volatile memory, and a memory controller. The volatile memory includes a free block management table, and a worn block management table. If the number of free blocks is equal to or larger than a threshold value 1, and errors of the number of equal to or larger than a threshold value 2 but smaller than a threshold value 3 are included in the data read from the nonvolatile memory, the memory controller registers the block in the worn block management table as a worn block. If the number of free blocks becomes smaller than the threshold value 1, the memory controller registers the worn block registered in the worn block management table in the free block management table as the free block.
    Type: Application
    Filed: April 9, 2013
    Publication date: October 17, 2013
    Applicant: Hitachi, Ltd.
    Inventors: Ryoichi INADA, Ryo FUJITA, Yuzuru TAKAHASHI
  • Publication number: 20120246399
    Abstract: Disclosed is a storage device using non-volatile semiconductor memory that achieves high performance and long life for the device. When managing the non-volatile semiconductor memory (2), physical blocks are classified into three types: scratch blocks (22), data blocks (23), and erased blocks (24). Data writing from a host device (3) is performed on the scratch blocks. When the number of empty pages within a scratch block becomes less than a predetermined number or no longer exists, the block is treated thereafter as a data block, and one of the erased blocks is newly assigned as a scratch block. If there are insufficient erased blocks, a block with relatively less valid data is selected from among the data blocks. After copying all valid data included in the block to a scratch block, the block is erased, and thus an erased block is acquired.
    Type: Application
    Filed: December 1, 2010
    Publication date: September 27, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Masataka Nishi, Ryo Fujita, Ryoichi Inada, Takuma Nishimura, Masahiro Shiraishi, Koji Matsuda
  • Publication number: 20120215965
    Abstract: A nonvolatile memory stores therein a plurality of partitioned translation tables which are created by partitioning a logical-to-physical address translation table in a page unit. A RAM stores therein a logical-to-physical address translation table cache for storing at least the one or more partitioned translation tables, a translation-table management table for managing the partitioned translation tables, and a cache management table for managing the logical-to-physical address translation table cache. The translation-table management table includes a cache presence-or-absence flag and a cache entry number, the cache presence-or-absence flag being used for indicating that the partitioned translation tables are stored into the logical-to-physical address translation table cache, the cache entry number being used for indicating storage destinations of the partitioned translation tables in the logical-to-physical address translation table cache.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 23, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Ryoichi Inada, Ryo Fujita, Takuma Nishimura, Koji Matsuda
  • Patent number: 5049742
    Abstract: An apparatus for detecting the deterioration of an engine oil including a ceramic heater radiating infrared light including infrared radiation having a wavelength of 6.1 micron meters which is equal to the specific infrared absorption peak of ester of nitric acid contained in the engine oil. The infrared light is made incident upon a photodetector via a band pass filter having a center wavelength of 6.1 micron meters to detect an amount of the ester of nitric acid contained in the engine oil. It has been experimentally confirmed that an amount of the ester of nitric acid is proportional to the total acid value which is a measure of the deterioration of the engine oil, so that by suitably processing an output signal of the photodetector, it is possible to detect the deterioration of the engine oil. The thus detected deterioration may be displayed on a display device provided on a front pedal of a car.
    Type: Grant
    Filed: November 16, 1989
    Date of Patent: September 17, 1991
    Assignee: Kyodo Oil Technical Research Co., Ltd.
    Inventors: Kunihiko Hosonuma, Yasushi Naito, Ryoichi Inada