Patents by Inventor Ryoichi Ohara
Ryoichi Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170271443Abstract: A semiconductor device includes a silicon carbide layer having first and second surfaces. The layer includes a first conductivity type first region extending from the first surface to the second surface, a second conductivity type second region extending inwardly of the first surface and surrounding a portion of the first region, and a second conductivity type third region surrounding the second region. The third region has an impurity concentration lower than the impurity concentration of the second region. The semiconductor device includes a first electrode extending over the portion of the first region and a portion of the second region, a first insulating layer extending over the third region and partially over the second region, and a second insulating layer overlying the first insulating layer and having a first portion and a second portion thicker than the first portion overlying the boundary between the second and third regions.Type: ApplicationFiled: August 25, 2016Publication date: September 21, 2017Inventor: Ryoichi OHARA
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Patent number: 9620600Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.Type: GrantFiled: September 15, 2015Date of Patent: April 11, 2017Assignee: Kabushiki kaisha ToshibaInventors: Ryoichi Ohara, Takao Noda
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Patent number: 9608058Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.Type: GrantFiled: March 7, 2016Date of Patent: March 28, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi Ohara, Takao Noda, Yoichi Hori
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Publication number: 20170077220Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.Type: ApplicationFiled: March 7, 2016Publication date: March 16, 2017Applicants: KABUSHIKI KAISHA TOSHIBA, KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi OHARA, Takao NODA, Yoichi HORI
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Publication number: 20160276448Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.Type: ApplicationFiled: September 15, 2015Publication date: September 22, 2016Inventors: Ryoichi Ohara, Takao Noda
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Publication number: 20150357482Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: ApplicationFiled: August 18, 2015Publication date: December 10, 2015Inventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Patent number: 9178079Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, and first, second, and third semiconductor regions. The first semiconductor region has a first conductivity type. The first electrode is provided above the first semiconductor region. The second semiconductor region has a second conductivity type and is provided between the first semiconductor region and the first electrode. The third semiconductor region is provided between the first semiconductor region and the first electrode, and has the second conductivity type. The third semiconductor region has an impurity concentration substantially equal to an impurity concentration of the second semiconductor region, and has first and second portions. The first and second portions constitute a concave-convex form on a side of the first semiconductor region of the third semiconductor region. The second electrode is provided above an opposite side of the first semiconductor region from the first electrode.Type: GrantFiled: March 10, 2014Date of Patent: November 3, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Kono, Ryoichi Ohara
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Patent number: 9142565Abstract: A semiconductor device includes a SOI substrate including a silicon substrate, an oxide layer on the silicon substrate, and a silicon layer on the oxide layer; a source region and a drain region formed in the silicon layer; and an acceptor-doped layer formed between the oxide layer and the silicon substrate, the acceptor-doped layer being doped with acceptors.Type: GrantFiled: June 11, 2013Date of Patent: September 22, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara
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Patent number: 9142687Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: GrantFiled: March 7, 2014Date of Patent: September 22, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Publication number: 20150069414Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, and first, second, and third semiconductor regions. The first semiconductor region has a first conductivity type. The first electrode is provided above the first semiconductor region. The second semiconductor region has a second conductivity type and is provided between the first semiconductor region and the first electrode. The third semiconductor region is provided between the first semiconductor region and the first electrode, and has the second conductivity type. The third semiconductor region has an impurity concentration substantially equal to an impurity concentration of the second semiconductor region, and has first and second portions. The first and second portions constitute a concave-convex form on a side of the first semiconductor region of the third semiconductor region. The second electrode is provided above an opposite side of the first semiconductor region from the first electrode.Type: ApplicationFiled: March 10, 2014Publication date: March 12, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiroshi Kono, Ryoichi Ohara
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Publication number: 20150001552Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: ApplicationFiled: March 7, 2014Publication date: January 1, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Patent number: 8916881Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.Type: GrantFiled: September 10, 2013Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
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Patent number: 8866151Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer of a first conductivity type, a first region of a second conductivity type selectively provided in a first major surface of the semiconductor layer, a second region of the second conductivity type selectively provided in the first major surface and connected to the first region, a first electrode provided in contact with the semiconductor layer and the first region, a second electrode provided in contact with the second region, and a third electrode electrically connected to a second major surface of the semiconductor layer opposite to the first major surface.Type: GrantFiled: March 20, 2012Date of Patent: October 21, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takao Noda, Ryoichi Ohara, Kenya Sano, Toru Sugiyama
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Publication number: 20140283618Abstract: According to one embodiment, a semiconductor device includes a substrate, a semiconductor substrate, an insulating gate field-effect transistor, and a strain gauge unit. The semiconductor substrate is placed on the substrate and has first and second regions. The insulating gate field-effect transistor is provided in the first region of the semiconductor substrate. The strain gauge unit has a long metal resistor, a first insulating film and a second insulating film. The long metal resistor is provided inside of an upper surface of the semiconductor substrate in the second region of the semiconductor substrate. The first insulating film is provided between the semiconductor substrate and the metal resistor and extends up to the upper surface of the semiconductor substrate. The second insulating film is provided above the first insulating film across the metal resistor.Type: ApplicationFiled: September 5, 2013Publication date: September 25, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takaaki Yasumoto, Naoko Yanase, Ryoichi Ohara, Shingo Masuko, Kenya Sano, Yorito Kakiuchi, Takao Noda, Atsuko IIda
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Publication number: 20140014971Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.Type: ApplicationFiled: September 10, 2013Publication date: January 16, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Naoko YANASE, Shingo MASUKO, Takaaki YASUMOTO, Ryoichi OHARA, Yorito KAKIUCHI, Takao NODA, Kenya SANO
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Publication number: 20130270640Abstract: A semiconductor device includes a SOI substrate including a silicon substrate, an oxide layer on the silicon substrate, and a silicon layer on the oxide layer; a source region and a drain region formed in the silicon layer; and an acceptor-doped layer formed between the oxide layer and the silicon substrate, the acceptor-doped layer being doped with acceptors.Type: ApplicationFiled: June 11, 2013Publication date: October 17, 2013Inventors: Yoshitomo SAGAE, Fumio SASAKI, Ryoichi OHARA
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Patent number: 8558244Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.Type: GrantFiled: February 4, 2011Date of Patent: October 15, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
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Publication number: 20120241762Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer of a first conductivity type, a first region of a second conductivity type selectively provided in a first major surface of the semiconductor layer, a second region of the second conductivity type selectively provided in the first major surface and connected to the first region, a first electrode provided in contact with the semiconductor layer and the first region, a second electrode provided in contact with the second region, and a third electrode electrically connected to a second major surface of the semiconductor layer opposite to the first major surface.Type: ApplicationFiled: March 20, 2012Publication date: September 27, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Takao NODA, Ryoichi Ohara, Kenya Sano, Toru Sugiyama
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Publication number: 20120146176Abstract: A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.Type: ApplicationFiled: February 17, 2012Publication date: June 14, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara
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Patent number: 8134224Abstract: A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.Type: GrantFiled: March 11, 2008Date of Patent: March 13, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara