Patents by Inventor Ryoichi Takano

Ryoichi Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126205
    Abstract: An image forming apparatus having front and rear surfaces, a photoreceptor having a rotation axis extending in a first direction, an exposure unit, and a cooling unit. The exposure unit includes a substrate having a longitudinal axis extending in the first direction, a first surface and a second surface. A plurality of light emitting elements that emit light toward the photoreceptor are mounted on the first surface of the substrate. The cooling unit includes an intake port that sucks air from outside of the image forming apparatus The intake port is disposed at an intake port distance in the first direction to the rear surface. The intake port distance is shorter than a distance in the first direction of a center of the substrate to the rear surface. The cooling unit cools the substrate by blowing air sucked by the intake port onto the second surface of the substrate.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: TAKEHIRO ISHIDATE, HIROKI TAKANO, RYOICHI KAWASUMI
  • Patent number: 7683723
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: March 23, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Patent number: 7433653
    Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: October 7, 2008
    Assignees: Renesas Technology Corp., TTPCOM Limited
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Yasuyuki Kimura, Hiroshi Hagisawa, Patrick Wurm, Robert Astle Henshaw, David Freeborough
  • Patent number: 7424276
    Abstract: In a transmitter of polar-loop architecture having a phase control loop and an amplitude control loop, as loop filters for controlling a loop band of the amplitude control loop, a first filter with lag-lead characteristics (secondary or more filter including a capacitor and a resistor) and a second filter of a perfect integrator type (filter including only a capacitor) are employed, and current-output type circuits are connected to respective front stages of the first and second filters.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: September 9, 2008
    Assignees: Renesas Technology Corp., TTPCOM Limited
    Inventors: Taizo Yamawaki, Hisayoshi Kajiwara, Ryoichi Takano, Patrick Wurm
  • Patent number: 7356092
    Abstract: When a transmitting oscillator is built in a communication semiconductor integrated circuit device like a high-frequency IC constituting a wireless communication system, the system prevents degradation of the accuracy of control on the output power of a power amplifier due to noise jumped from an output pin of the transmitting oscillator to an input pin for a detected signal (feedback signal) of an output level of the power amplifier. The transmitting oscillator is built in the high-frequency IC. The detected signal of the output level of the power amplifier, which is detected by a coupler, is attenuated to a level slightly higher than the level of noise jumped from the output pin of the transmitting oscillator to the input pin for a feedback signal of an amplitude control loop, which in turn is inputted to the feedback signal input pin of the high-frequency IC.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 8, 2008
    Assignee: Renesas Technology Corporation
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Kenji Toyota, Kazuhisa Okada
  • Patent number: 7352250
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Patent number: 7336136
    Abstract: A transmission oscillator of differential output configuration is incorporated into a high frequency IC. Further, an equivalent impedance having an impedance equivalent to the impedance connected with a regular output terminal is provided. Or, a dummy external terminal for outputting transmit signals in opposite phase is provided. One of the differential outputs of the transmission oscillator is inputted to the power amplifier through the regular output terminal. The other of the differential outputs is connected to the equivalent impedance or the dummy external terminal.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: February 26, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Koichi Yahagi, Kazuhiko Hikasa, Ryoichi Takano
  • Publication number: 20080030281
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Application
    Filed: October 2, 2007
    Publication date: February 7, 2008
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Patent number: 7324787
    Abstract: In a radio communication system having a phase control loop for phase modulation and an amplitude control loop for amplitude modulation and being capable of time divisional transmission and reception under a predetermined time management, when transmission in a first mode is switched to transmission in a second mode or when transmission in the second mode is switched to transmission in the first mode, the output level of the power amplifier is lowered once to a predetermined level higher than the level when transmission related circuits are activated, and thereafter the output level of the power amplifier is again ramped after the settings have been changed but without starting of a transmission oscillator, establishing of the phase control loop and the amplitude control loop.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: January 29, 2008
    Assignees: Renesas Technology Corporation, TTPCOM Limited
    Inventors: Noriyuki Kurakami, Kazuhiko Hikasa, Ryoichi Takano, Patrick Wurm
  • Publication number: 20070249297
    Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.
    Type: Application
    Filed: June 18, 2007
    Publication date: October 25, 2007
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Yasuyuki Kimura, Hiroshi Hagisawa, Patrick Wurm, Robert Henshaw, David Freeborough
  • Patent number: 7248842
    Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: July 24, 2007
    Assignees: Renesas Technology Corp., Tipcom Limited
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Yasuyuki Kimura, Hiroshi Hagisawa, Patrick Wurm, Robert Astle Henshaw, David Freeborough
  • Publication number: 20070026834
    Abstract: A transmission oscillator of differential output configuration is incorporated into a high frequency IC. Further, an equivalent impedance having an impedance equivalent to the impedance connected with a regular output terminal is provided. Or, a dummy external terminal for outputting transmit signals in opposite phase is provided. One of the differential outputs of the transmission oscillator is inputted to the power amplifier through the regular output terminal. The other of the differential outputs is connected to the equivalent impedance or the dummy external terminal.
    Type: Application
    Filed: October 12, 2006
    Publication date: February 1, 2007
    Inventors: Koichi Yahagi, Kazuhiko Hikasa, Ryoichi Takano
  • Patent number: 7132900
    Abstract: If a transmission oscillator is incorporated into a communication semiconductor integrated circuit, such as high a frequency IC, constituting a wireless communication system, a problem arises. The accuracy of control of the output power of a power amplifier is degraded. This degradation in accuracy is caused by coupling noise between the output pins of the transmission oscillator and an input pin for detection signals (feedback signals) associated with the output level of the power amplifier or crosstalk. To prevent this, a transmission oscillator of differential output configuration is incorporated into a high frequency IC and an impedance equivalent to the impedance connected with a regular output terminal or a dummy external terminal for outputting transmit signals in opposite phase is provided.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: November 7, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Koichi Yahagi, Kazuhiko Hikasa, Ryoichi Takano
  • Publication number: 20060234661
    Abstract: The present invention provides a semiconductor integrated circuit for communication (radio frequency IC) capable of detecting and correcting variations in an amplitude loop band of a transmission circuit having a phase control loop and an amplitude control loop without using an external measuring apparatus. In a semiconductor integrated circuit for communication (radio frequency IC) including a transmission circuit having a phase control loop for controlling the phase of a carrier wave and an amplitude control loop for controlling the amplitude of a transmission output signal, a calibration circuit for detecting variations in a loop gain of the amplitude control loop and correcting the loop band is provided.
    Type: Application
    Filed: April 17, 2006
    Publication date: October 19, 2006
    Inventors: Kenji Toyota, Ryoichi Takano, Noriyuki Kurakami
  • Publication number: 20060220750
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Application
    Filed: January 30, 2006
    Publication date: October 5, 2006
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Publication number: 20060217081
    Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.
    Type: Application
    Filed: May 30, 2006
    Publication date: September 28, 2006
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Yasuyuki Kimura, Hiroshi Hagisawa, Patrick Wurm, Robert Henshaw, David Freeborough
  • Publication number: 20060189285
    Abstract: A polar-loop wireless communication apparatus includes, on a forward path between an amplitude detector and a power amplifier which constitute an amplitude control loop, a variable gain amplifier and a switch to change characteristics of a loop filter to output a frequency bandwidth of the amplitude control loop to an order less than an order for normal operation. The system is operated with the characteristics set to the lower order to measure outputs from the power amplifier to calibrate the output power of the power transmitter, and the register is operated with the characteristics set to the higher order to measure the open loop gain of the amplitude control. According to results of the calculation, data to correct gain characteristics of the variable gain amplifier with respect to an output control signal is stored in a nonvolatile memory of a baseband circuit.
    Type: Application
    Filed: April 21, 2006
    Publication date: August 24, 2006
    Inventors: Ryoichi Takano, Kenji Toyota, Patrick Wurm, Robert Henshaw, David Freeborough
  • Patent number: 7085544
    Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 1, 2006
    Assignees: Renesas Technology Corp., TTPCOM Limited
    Inventors: Ryoichi Takano, Kazuhiko Hikasa, Yasuyuki Kimura, Hiroshi Hagisawa, Patrick Wurm, Robert Astle Henshaw, David Freeborough
  • Patent number: 7082290
    Abstract: A polar-loop wireless communication apparatus includes, on a forward path between an amplitude detector and a power amplifier which constitute an amplitude control loop, a variable gain amplifier and a switch to change characteristics of a loop filter to output a frequency bandwidth of the amplitude control loop to an order less than an order for normal operation. The system is operated with the characteristics set to the lower order to measure outputs from the power amplifier to calibrate the output power of the power transmitter, and the register is operated with the characteristics set to the higher order to measure the open loop gain of the amplitude control. According to results of the calculation, data to correct gain characteristics of the variable gain amplifier with respect to an output control signal is stored in a nonvolatile memory of a baseband circuit.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: July 25, 2006
    Assignees: Renesas Technology Corp., TTPCOM Limited
    Inventors: Ryoichi Takano, Kenji Toyota, Patrick Wurm, Robert Astle Henshaw, David Freeborough
  • Publication number: 20050176388
    Abstract: In a transmitter of polar-loop architecture having a phase control loop and an amplitude control loop, as loop filters for controlling a loop band of the amplitude control loop, a first filter with lag-lead characteristics (secondary or more filter including a capacitor and a resistor) and a second filter of a perfect integrator type (filter including only a capacitor) are employed, and current-output type circuits are connected to respective front stages of the first and second filters.
    Type: Application
    Filed: February 18, 2003
    Publication date: August 11, 2005
    Inventors: Taizo Yamawaki, Hisayoshi Kajiwara, Ryoichi Takano, Patrick Wurm