Abstract: An ophthalmologic information processing apparatus corrects an image of a subject's eye formed by arranging a plurality of A-scan images acquired by scanning inside the subject's eye with measurement light deflected around a scan center position. The ophthalmologic information processing apparatus includes a specifying unit and a transforming unit. The specifying unit is configured to specify a transformation position along a traveling direction of the measurement light passing through the scan center position, the transformation position corresponding to a pixel position in the image. The transforming unit is configured to transform the pixel position into the transformation position.

Abstract: An ophthalmologic information processing apparatus corrects an image of a subject's eye formed by arranging a plurality of A-scan images acquired by scanning inside the subject's eye with measurement light deflected around a scan center position. The ophthalmologic information processing apparatus includes a specifying unit and a transforming unit. The specifying unit is configured to specify a transformation position along a traveling direction of the measurement light passing through the scan center position, the transformation position corresponding to a pixel position in the image. The transforming unit is configured to transform the pixel position into the transformation position.

Abstract: An ophthalmologic information processing apparatus analyzes an image of a subject's eye formed by arranging a plurality of A-scan images acquired by performing OCT scan on inside the subject's eye with measurement light deflected around a scan center position. The ophthalmologic information processing apparatus includes a correcting unit, a region specifying unit, and a direction specifying unit. The correcting unit is configured to transform a pixel position in the image into a transformation position along a traveling direction of the measurement light passing through the scan center position. The region specifying unit is configured to specify a predetermined layer region by analyzing the image in which the pixel position has been transformed by the correcting unit. The direction specifying unit is configured to specify a normal direction of the layer region specified by the region specifying unit.

Abstract: A digital noise filter circuit includes a gating clock generating circuit and a noise filter circuit. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The gating clock generating circuit supplies a gating clock as an operating clock to the noise filter circuit when the logic levels of both signals do not coincide, and halts supply of the gating clock when the logic levels of both signals do coincide. The noise filter circuit removes noise from the input signal and outputting the resultant signal as the output signal.

Abstract: A data processing device for detecting the abnormal operation of a CPU is provided. The data processing device comprises a CPU, an interrupt counter, and a counter-abnormal-value detection circuit. The interrupt counter increments a count value based on an interrupt start signal which is outputted in response to an interrupt signal indicative of an interrupt request to the CPU and which indicates that the interrupt request has been accepted, and decrements the count value based on an end-of-interrupt signal which indicates that processing corresponding to the interrupt has completed. The counter-abnormal-value detection circuit detects abnormalities by comparing the count value with a predetermined value.

Abstract: A microcomputer includes a CPU (Central Processing Unit), a DMA (Direct Memory Access) processing unit, and a control unit. The control unit controls a processing speed of the CPU to be faster as the number of holding transfers increases, in which the number of holding transfers is the number of DMA transfers held to the DMA processing unit.

Abstract: The asynchronous circuit includes a plurality of circuit blocks connected in a hierarchical structure, each circuit block including an arithmetic circuit and a control circuit that makes two-phase control on the arithmetic circuit, and a mode control circuit. The mode control circuit controls a circuit block in a first stage to start initialization when the circuit block starts idle phase and start working phase when a circuit block in a lowermost stage starts idle phase, and controls a circuit block in a second stage to start working phase when the circuit block in the first block starts initialization and start initialization when the circuit block in the first stage starts working phase. This improves the processing speed of a two-phase asynchronous circuit and suppresses an increase in circuit size.

Abstract: A digital noise filter circuit includes a gating clock generating circuit and a noise filter circuit. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The gating clock generating circuit supplies a gating clock as an operating clock to the noise filter circuit when the logic levels of both signals do not coincide, and halts supply of the gating clock when the logic levels of both signals do coincide. The noise filter circuit removes noise from the input signal and outputting the resultant signal as the output signal.

Abstract: A data processing device for detecting the abnormal operation of a CPU is provided. The data processing device comprises a CPU, an interrupt counter, and a counter-abnormal-value detection circuit. The interrupt counter increments a count value based on an interrupt start signal which is outputted in response to an interrupt signal indicative of an interrupt request to the CPU and which indicates that the interrupt request has been accepted, and decrements the count value based on an end-of-interrupt signal which indicates that processing corresponding to the interrupt has completed. The counter-abnormal-value detection circuit detects abnormalities by comparing the count value with a predetermined value.

Abstract: A digital noise filter circuit includes a gating clock generating circuit and a noise filter circuit. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The gating clock generating circuit supplies a gating clock as an operating clock to the noise filter circuit when the logic levels of both signals do not coincide, and halts supply of the gating clock when the logic levels of both signals do coincide. The noise filter circuit removes noise from the input signal and outputting the resultant signal as the output signal.

Abstract: A digital noise filter circuit includes a gating clock generating circuit and a noise filter circuit. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The gating clock generating circuit supplies a gating clock as an operating clock to the noise filter circuit when the logic levels of both signals do not coincide, and halts supply of the gating clock when the logic levels of both signals do coincide. The noise filter circuit removes noise from the input signal and outputting the resultant signal as the output signal.

Abstract: A mark position detection system used in a charged particle beam apparatus and including detection circuit for detecting a reflected electron generated at a mark when the mark is scanned with a charged particle beam, to obtain a mark signal, and signal processing circuit for comparing the mark signal from the detection circuit with a predetermined threshold level to find the position of the charged particle beam at a time the mark signal traverses the threshold level, thereby detecting the position of a mark edge, is disclosed in which, when the mark signal traverses the threshold level and has a peak value exceeding a predetermined value, it is determined by the signal processing circuit that the position of the charged particle beam at a time point at which the mark signal traverses the threshold level is the position of the mark.