Patents by Inventor Ryoji Furuya

Ryoji Furuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8315579
    Abstract: The present invention provides a semiconductor integrated circuit for communication (RF IC) realizing high yield without deteriorating a carrier leak characteristic even when a modulation circuit is formed by using cheep parts with large variations. In a semiconductor integrated circuit (RF IC) including: an input circuit constructed by a differential amplifier circuit and a level shifter, which is provided on the ante stage of a mixer of a differential circuit called a Gilbert Cell; and a modulation circuit that performs modulation by adding an I/Q signal and a carrier wave signal, a calibration circuit for canceling a DC offset in an output of the input circuit is provided.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: November 20, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Ryoji Furuya, Kazuhisa Okada, Hiroaki Matsui
  • Publication number: 20110053529
    Abstract: The present invention provides a semiconductor integrated circuit for communication (RF IC) realizing high yield without deteriorating a carrier leak characteristic even when a modulation circuit is formed by using cheep parts with large variations. In a semiconductor integrated circuit (RF IC) including: an input circuit constructed by a differential amplifier circuit and a level shifter, which is provided on the ante stage of a mixer of a differential circuit called a Gilbert Cell; and a modulation circuit that performs modulation by adding an I/Q signal and a carrier wave signal, a calibration circuit for canceling a DC offset in an output of the input circuit is provided.
    Type: Application
    Filed: November 1, 2010
    Publication date: March 3, 2011
    Applicant: Renesas Electronics Corporation
    Inventors: Ryoji Furuya, Kazuhisa Okada, Hiroaki Matsui
  • Patent number: 7848716
    Abstract: The present invention provides a semiconductor integrated circuit for communication (RF IC) realizing high yield without deteriorating a carrier leak characteristic even when a modulation circuit is formed by using cheep parts with large variations. In a semiconductor integrated circuit (RF IC) including: an input circuit constructed by a differential amplifier circuit and a level shifter, which is provided on the ante stage of a mixer of a differential circuit called a Gilbert Cell; and a modulation circuit that performs modulation by adding an I/Q signal and a carrier wave signal, a calibration circuit for canceling a DC offset in an output of the input circuit is provided.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: December 7, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Ryoji Furuya, Kazuhisa Okada, Hiroaki Matsui
  • Patent number: 7386064
    Abstract: In one embodiment, a PLL circuit is provided with a plurality of pull-in operation modes for pulling a voltage across a filter capacitor (C1, C2) in a lock-up voltage, and with a register (CRG) for designating one of the plurality of pull-in operation modes. The pull-in operation is performed in accordance with a setting value in the register.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 10, 2008
    Assignees: Renesas Technology Corp., TTPCOM Limited, Hitachi Advanced Digital, Inc., Hitachi ULSI Systems Co., Ltd.
    Inventors: Koichi Yahagi, Ryoji Furuya, Fumiaki Matsuzaki, Robert Astle Henshaw
  • Publication number: 20060194606
    Abstract: The present invention provides a semiconductor integrated circuit for communication (RF IC) realizing high yield without deteriorating a carrier leak characteristic even when a modulation circuit is formed by using cheep parts with large variations. In a semiconductor integrated circuit (RF IC) including: an input circuit constructed by a differential amplifier circuit and a level shifter, which is provided on the ante stage of a mixer of a differential circuit called a Gilbert Cell; and a modulation circuit that performs modulation by adding an I/Q signal and a carrier wave signal, a calibration circuit for canceling a DC offset in an output of the input circuit is provided.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 31, 2006
    Inventors: Ryoji Furuya, Kazuhisa Okada, Hiroaki Matsui
  • Publication number: 20050068074
    Abstract: In one embodiment, a PLL circuit is provided with a plurality of pull-in operation modes for pulling a voltage across a filter capacitor (C1, C2) in a lock-up voltage, and with a register (CRG) for designating one of the plurality of pull-in operation modes. The pull-in operation is performed in accordance with a setting value in the register.
    Type: Application
    Filed: November 6, 2002
    Publication date: March 31, 2005
    Inventors: Koichi Yahagi, Ryoji Furuya, Fumiaki Matsuzaki, Robert Henshaw