Patents by Inventor Ryoji Matsuda
Ryoji Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11946390Abstract: Provided is a rotor blade configured to be implanted in a disc of a rotating body, the rotor blade including a blade root, wherein in a cross-sectional shape of the blade root, the blade root includes at least one stage of protruding parts protruding toward opposite sides with respect to a direction containing a circumferential component, the protruding parts being configured to lock the blade root to the disc, each of the protruding parts has a contact surface configured to come into contact with the disc and inclined so as to extend toward a center part of the blade root from radially inside to radially outside, and each of the protruding parts has a non-contact surface configured not to come into contact with the disc and inclined so as to extend toward the center part of the blade root from the radially inside to the radially outside.Type: GrantFiled: June 25, 2021Date of Patent: April 2, 2024Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHAInventors: Hirotaka Kurashima, Hirokazu Matsuda, Ryoji Tamai, Ryozo Tanaka
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Patent number: 10564334Abstract: A spectral filter (10) is provided with a long-pass filter (12) and a short-pass filter (13). The long-pass filter (12) has a film thickness gradient GL wherein film thickness increases monotonically in a single direction, and transmits light of a wavelength region longer than a cut-off wavelength WL. The short-pass filter (13) has a film thickness gradient GS wherein film thickness increases monotonically in a single direction, and transmits light of a wavelength region shorter than a cut-off wavelength WS. The long-pass filter (12) and the short-pass filter (13) are overlapped such that the single directions match each other. At the positions in the single directions, a transmittance peak is formed by the cut-off wavelength WL being shorter than the cut-off wavelength WS. The film thickness gradient GL is greater than the film thickness gradient GS.Type: GrantFiled: March 28, 2016Date of Patent: February 18, 2020Assignee: KONICA MINOLTA, INC.Inventors: Hidetaka Jidai, Munenori Kawaji, Ryoji Matsuda
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Publication number: 20180095207Abstract: A spectral filter (10) is provided with a long-pass filter (12) and a short-pass filter (13). The long-pass filter (12) has a film thickness gradient GL wherein film thickness increases monotonically in a single direction, and transmits light of a wavelength region longer than a cut-off wavelength WL. The short-pass filter (13) has a film thickness gradient GS wherein film thickness increases monotonically in a single direction, and transmits light of a wavelength region shorter than a cut-off wavelength WS. The long-pass filter (12) and the short-pass filter (13) are overlapped such that the single directions match each other. At the positions in the single directions, a transmittance peak is formed by the cut-off wavelength WL being shorter than the cut-off wavelength WS. The film thickness gradient GL is greater than the film thickness gradient GS.Type: ApplicationFiled: March 28, 2016Publication date: April 5, 2018Inventors: Hidetaka JIDAI, Munenori KAWAJI, Ryoji MATSUDA
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Patent number: 9490246Abstract: A P-type epitaxial growth layer is formed on a P-type semiconductor substrate with an N-type buried region and a P-type buried region interposed therebetween. A cathode region, an anode region, and an N-type sinker region are formed in P-type epitaxial growth layer. A resistance element is formed on a surface of an isolation region that electrically isolates anode region and N-type sinker region. Resistance element has: one end portion electrically connected to each of anode region and N-type sinker region; and the other end portion electrically connected to a ground potential.Type: GrantFiled: July 24, 2015Date of Patent: November 8, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yasuki Yoshihisa, Ryoji Matsuda
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Publication number: 20160056149Abstract: A P-type epitaxial growth layer is formed on a P-type semiconductor substrate with an N-type buried region and a P-type buried region interposed therebetween. A cathode region, an anode region, and an N-type sinker region are formed in P-type epitaxial growth layer. A resistance element is formed on a surface of an isolation region that electrically isolates anode region and N-type sinker region. Resistance element has: one end portion electrically connected to each of anode region and N-type sinker region; and the other end portion electrically connected to a ground potential.Type: ApplicationFiled: July 24, 2015Publication date: February 25, 2016Inventors: Yasuki YOSHIHISA, Ryoji MATSUDA
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Patent number: 9263113Abstract: A semiconductor device in which noise is reduced without an increase in chip area. The device is used as an MRAM in which a memory mat is formed on a silicon substrate surface and the central area of the memory mat is used as a memory array and the area around the memory array is used as a dummy memory array. In the dummy memory array, a capacitor is formed between each bit line, each digit line and a supply voltage line, and a grounding voltage line. Therefore the peak value of a current flowing in each of the bit lines, digit lines and supply voltage line is decreased.Type: GrantFiled: June 7, 2013Date of Patent: February 16, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Ryoji Matsuda, Motoi Ashida, Yasumitsu Murai
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Publication number: 20130343113Abstract: A semiconductor device in which noise is reduced without an increase in chip area. The device is used as an MRAM in which a memory mat is formed on a silicon substrate surface and the central area of the memory mat is used as a memory array and the area around the memory array is used as a dummy memory array. In the dummy memory array, a capacitor is formed between each bit line, each digit line and a supply voltage line, and a grounding voltage line. Therefore the peak value of a current flowing in each of the bit lines, digit lines and supply voltage line is decreased.Type: ApplicationFiled: June 7, 2013Publication date: December 26, 2013Inventors: Ryoji MATSUDA, Motoi ASHIDA, Yasumitsu MURAI
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Patent number: 8546151Abstract: Disclosed is a method for manufacturing a magnetic storage device comprising a TMR element, which comprises a step for forming an insulting film on an interlayer insulating film provided with a wiring layer, an opening formation step for forming an opening in the insulating film so that the wiring layer is exposed therefrom, a metal layer formation step for forming a metal layer on the insulating layer so that the opening is filled therewith, a CMP step for polishing and removing the metal layer on the insulating layer by a CMP method and forming the metal layer remaining in the opening into a lower electrode, and a step for forming a TMR element on the lower electrode.Type: GrantFiled: February 25, 2008Date of Patent: October 1, 2013Assignee: Renesas Electronics CorporationInventors: Haruo Furuta, Shuichi Ueno, Ryoji Matsuda, Tatsuya Fukumura, Takeharu Kuroiwa, Lien-Chang Wang, Eugene Chen, Yiming Huai
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Patent number: 8518562Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.Type: GrantFiled: November 12, 2009Date of Patent: August 27, 2013Assignee: Renesas Electronics CorporationInventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Ryoji Matsuda, Yosuke Takeuchi
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Patent number: 8383427Abstract: A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.Type: GrantFiled: August 3, 2012Date of Patent: February 26, 2013Assignee: Renesas Electronics CorporationInventors: Ryoji Matsuda, Shuichi Ueno, Haruo Furuta, Takashi Takenaga, Takeharu Kuroiwa
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Publication number: 20120301975Abstract: A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.Type: ApplicationFiled: August 3, 2012Publication date: November 29, 2012Inventors: Ryoji Matsuda, Shuichi Ueno, Haruo Furuta, Takashi Takenaga, Takeharu Kuroiwa
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Patent number: 8286509Abstract: The present invention provides a tactile sensor which can reproduce a sensor surface in contact with a sensing object and contribute to a reduction in cost of an automation system which utilizes an industrial robot, the tactile sensor including: a contact-portion unit 12 composed of a flexible material; a contact-portion housing unit 11 which surrounds and houses the contact-portion unit in a removable state while forming a posture so that a top portion of the contact-portion unit may project; and a strain sensing element 15 or a pressure sensing element embedded into the contact-portion housing unit.Type: GrantFiled: December 21, 2007Date of Patent: October 16, 2012Assignee: Tokyo Denki UniversityInventors: Hiroshi Igarashi, Ryoji Matsuda
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Patent number: 8264023Abstract: A semiconductor device includes a semiconductor substrate, a lower electrode, a magnetoresistive element, an upper electrode, and a protective film. The lower electrode is formed over the semiconductor substrate. The magnetoresistive element includes a fixed layer, a tunneling insulating film, and a free layer. The upper electrode is disposed over the free layer. The protective film covers the sides intersecting the main surfaces of the lower electrode, the fixed layer, the tunneling insulating film, the free layer, and the upper electrode. The fixed layer, whose magnetization direction is fixed, is disposed over the lower electrode. The tunneling insulating film is disposed over the fixed layer. The free layer, whose magnetization direction is variable, is disposed over a main surface of the tunneling insulating film. The width of the upper electrode is smaller than that of each of the lower electrode and the fixed layer.Type: GrantFiled: December 17, 2010Date of Patent: September 11, 2012Assignee: Renesas Electronics CorporationInventors: Yosuke Takeuchi, Masamichi Matsuoka, Ryoji Matsuda, Keisuke Tsukamoto
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Patent number: 8258592Abstract: A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.Type: GrantFiled: May 11, 2009Date of Patent: September 4, 2012Assignee: Renesas Electronics CorporationInventors: Ryoji Matsuda, Shuichi Ueno, Haruo Furuta, Takashi Takenaga, Takeharu Kuroiwa
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Patent number: 8216859Abstract: To provide a manufacturing method of a semiconductor device capable of forming, as a protective film of an MTJ element, a silicon nitride film having good insulation properties without deteriorating the properties of the MTJ element. The method of the invention includes steps of forming a silicon nitride film over the entire surface including an MTJ element portion (MTJ element and an upper electrode) while using a parallel plate plasma CVD apparatus as a film forming apparatus and a film forming gas not containing NH3 but composed of SiH4/N2/helium (He). The film forming temperature is set at from 200 to 350° C. More ideally, a flow rate ratio of He to SiH4 is set at from 100 to 125.Type: GrantFiled: March 23, 2011Date of Patent: July 10, 2012Assignee: Renesas Electronics CorporationInventors: Tatsunori Murata, Mikio Tsujiuchi, Ryoji Matsuda
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Publication number: 20120069638Abstract: A semiconductor device which it can accommodate variations in a write current threshold in each memory cell and can secure a write margin is provided. An MRAM device includes an MTJ memory cell arranged in a matrix, plural bit lines each arranged corresponding to a memory cell column, plural digit lines each arranged corresponding to a memory cell row, and a write current adjusting unit which adjusts a current amount of a write current to be flowed through a bit line and/or a digit line, in order to perform a data write to each MTJ memory cell normally. The write current adjusting unit divides the plural bit lines and/or the plural digit lines into units of at least one write current line as division units, and includes plural write current adjusting circuits which adjust the current amount of write current in each of the division units.Type: ApplicationFiled: July 21, 2011Publication date: March 22, 2012Inventors: Ryoji MATSUDA, Motoi Ashida, Takaharu Tsuji
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Publication number: 20110291209Abstract: To provide a magnetic memory device having an increased write current and improved reliability in writing. The magnetic memory device of the invention has a substrate, a write line provided over the substrate, a bit line placed with a space from the write line in a thickness direction of the substrate and extending in a direction crossing with an extending direction of the write line, and a magnetic memory element positioned between the write line and the bit line. The magnetic memory element has a pinned layer whose magnetization direction has been fixed and a recording layer whose magnetization direction changes, depending on an external magnetic field. The recording layer contains an alloy film. The alloy film contains cobalt, iron, and boron and its boron content exceeds 21 at %.Type: ApplicationFiled: June 1, 2011Publication date: December 1, 2011Inventors: Takashi TAKENAGA, Ryoji MATSUDA, Junichi TSUCHIMOTO
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Publication number: 20110204458Abstract: The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.Type: ApplicationFiled: May 3, 2011Publication date: August 25, 2011Inventors: Haruo FURUTA, Ryoji Matsuda, Shuichi Ueno, Takeharu Kuroiwa
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Publication number: 20110171755Abstract: To provide a manufacturing method of a semiconductor device capable of forming, as a protective film of an MTJ element, a silicon nitride film having good insulation properties without deteriorating the properties of the MTJ element. The method of the invention includes steps of forming a silicon nitride film over the entire surface including an MTJ element portion (MTJ element and an upper electrode) while using a parallel plate plasma CVD apparatus as a film forming apparatus and a film forming gas not containing NH3 but composed of SiH4/N2/helium (He). The film forming temperature is set at from 200 to 350° C. More ideally, a flow rate ratio of He to SiH4 is set at from 100 to 125.Type: ApplicationFiled: March 23, 2011Publication date: July 14, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Tatsunori MURATA, Mikio Tsujiuchi, Ryoji Matsuda
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Patent number: 7973376Abstract: The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.Type: GrantFiled: August 28, 2009Date of Patent: July 5, 2011Assignee: Renesas Electronics CorporationInventors: Haruo Furuta, Ryoji Matsuda, Shuichi Ueno, Takeharu Kuroiwa