Patents by Inventor Ryoji Oritsuki

Ryoji Oritsuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7129999
    Abstract: A liquid crystal display device includes first and second substrates, a liquid crystal layer, a plurality of video signal lines and scanning signal lines formed on the first delimiting pixel regions, a plurality of video signal line driving circuits, and a thin film transistor formed in the pixel regions, and driven by a scanning signal from a scanning signal line. A display area contains a plurality of the pixel regions and a first and second protection element lines are formed at a peripheral portion of the display area and connected to the video signal lines by first and second high-resistance elements. A first circuit board is electrically connected with a portion of the video signal line driving circuits and a second circuit board is electrically connected with another portion of the video signal line driving circuits.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: October 31, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Publication number: 20050185106
    Abstract: A liquid crystal display device includes first and second substrates, a liquid crystal layer, a plurality of video signal lines and scanning signal lines formed on the first delimiting pixel regions, a plurality of video signal line driving circuits, and a thin film transistor formed in the pixel regions, and driven by a scanning signal from a scanning signal line. A display area contains a plurality of the pixel regions and a first and second protection element lines are formed at a peripheral portion of the display area and connected to the video signal lines by first and second high-resistance elements. A first circuit board is electrically connected with a portion of the video signal line driving circuits and a second circuit board is electrically connected with another portion of the video signal line driving circuits.
    Type: Application
    Filed: April 22, 2005
    Publication date: August 25, 2005
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Patent number: 6888584
    Abstract: A liquid crystal display device having a first substrate, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, a plurality of video signal lines and scanning signal lines formed on the first substrate, and defining pixel regions, a thin film transistor formed in the pixel regions, and driven by a scanning signal from the scanning signal line for supplying video signal from one of the video signal lines to a pixel electrode and a display area containing a plurality of the pixel regions. A first protection element line formed at a peripheral portion of the display area, and being connected to a odd-numbered ones of the video signal lines by first high-resistance elements, and a second protection element line formed at a peripheral portion of the display area, and being connected to even-numbered ones of the video signal lines by second high-resistance elements.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: May 3, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Patent number: 6861299
    Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: March 1, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Horikoshi, Klyoshi Ogata, Takuo Tamura, Miwako Nakahara, Makoto Ohkura, Ryoji Oritsuki, Yasushi Nakano, Takeo Shiba
  • Patent number: 6815717
    Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer with a thickness of 4 nm or more at the surface of the polycrystalline silicon layer for forming a thin-film transistor having characteristics that are less varying on a glass substrate previously not annealed.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: November 9, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Horikoshi, Kiyoshi Ogata, Miwako Nakahara, Takuo Tamura, Yasushi Nakano, Ryoji Oritsuki, Toshihiko Itoga, Takahiro Kamo
  • Publication number: 20040169778
    Abstract: A liquid crystal display device having a first substrate, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, a plurality of video signal lines and scanning signal lines formed on the first substrate, and defining pixel regions, a thin film transistor formed in the pixel regions, and driven by a scanning signal from the scanning signal line for supplying video signal from one of the video signal lines to a pixel electrode and a display area containing a plurality of the pixel regions. A first protection element line formed at a peripheral portion of the display area, and being connected to a odd-numbered ones of the video signal lines by first high-resistance elements, and a second protection element line formed at a peripheral portion of the display area, and being connected to even-numbered ones of the video signal lines by second high-resistance elements.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 2, 2004
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Patent number: 6767760
    Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer of 4 nm or more thick at the surface of the polycrystalline silicon layer for forming a thin-film transistor having less variations of characteristics on an unannealed glass substrate.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: July 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Horikoshi, Kiyoshi Ogata, Miwako Nakahara, Takuo Tamura, Yasushi Nakano, Ryoji Oritsuki, Toshihiko Itoga, Takahiro Kamo
  • Patent number: 6710824
    Abstract: Pixel areas surrounded by scanning signal lines, video signal lines, and counter signal lines are formed on a liquid-crystal-side surface of a transparent substrate, and include thin-film transistors driven by scanning signals from the scanning signal lines, pixel electrodes to which video signals from the video signal lines are supplied via the thin-film transistors, and counter electrodes spaced apart from the pixel electrodes and connected to the counter signal lines. To prevent leakage current from flowing from the scanning signal lines or the video signal lines to the counter signal lines, a common line is formed around a display area constituted by the pixel areas, the video signal lines and the scanning signal lines are connected to the common line by non-linear elements, and the counter signal lines are connected to the common line by high-resistance elements.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: March 23, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Publication number: 20030189205
    Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.
    Type: Application
    Filed: April 2, 2003
    Publication date: October 9, 2003
    Inventors: Kazuhiko Horikoshi, Klyoshi Ogata, Takuo Tamura, Miwako Nakahara, Makoto Ohkura, Ryoji Oritsuki, Yasushi Nakano, Takeo Shiba
  • Patent number: 6570184
    Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: May 27, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Horikoshi, Klyoshi Ogata, Takuo Tamura, Miwako Nakahara, Makoto Ohkura, Ryoji Oritsuki, Yasushi Nakano, Takeo Shiba
  • Publication number: 20030042484
    Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.
    Type: Application
    Filed: January 18, 2002
    Publication date: March 6, 2003
    Inventors: Kazuhiko Horikoshi, Klyoshi Ogata, Takuo Tamura, Miwako Nakahara, Makoto Ohkura, Ryoji Oritsuki, Yasushi Nakano, Takeo Shiba
  • Publication number: 20020153567
    Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer of 4 nm or more thick at the surface of the polycrystalline silicon layer for forming a thin-film transistor having less variations of characteristics on an unannealed glass substrate.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 24, 2002
    Inventors: Kazuhiko Horikoshi, Kiyoshi Ogata, Miwako Nakahara, Takuo Tamura, Yasushi Nakano, Ryoji Oritsuki, Toshihiko Itoga, Takahiro Kamo
  • Publication number: 20020113264
    Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer of 4 nm or more thick at the surface of the polycrystalline silicon layer for forming a thin-film transistor having less variations of characteristics on an unannealed glass substrate.
    Type: Application
    Filed: November 20, 2001
    Publication date: August 22, 2002
    Inventors: Kazuhiko Horikoshi, Kiyoshi Ogata, Miwako Nakahara, Takuo Tamura, Yasyshi Nakano, Ryoji Oritsuki, Toshihiko Itoga, Takahiro Kamo
  • Publication number: 20020021397
    Abstract: Pixel areas surrounded by scanning signal lines, video signal lines, and counter signal lines are formed on a liquid-crystal-side surface of a transparent substrate, and include thin-film transistors driven by scanning signals from the scanning signal lines, pixel electrodes to which video signals from the video signal lines are supplied via the thin-film transistors, and counter electrodes spaced apart from the pixel electrodes and connected to the counter signal lines. To prevent leakage current from flowing from the scanning signal lines or the video signal lines to the counter signal lines, a common line is formed around a display area constituted by the pixel areas, the video signal lines and the scanning signal lines are connected to the common line by non-linear elements, and the counter signal lines are connected to the common line by high-resistance elements.
    Type: Application
    Filed: October 11, 2001
    Publication date: February 21, 2002
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Patent number: 6333769
    Abstract: Pixel areas surrounded by scanning signal lines, video signal lines, and counter signal lines are formed on a liquid-crystal-side surface of a transparent substrate, and include thin-film transistors driven by scanning signals from the scanning signal lines, pixel electrodes to which video signals from the video signal lines are supplied via the thin-film transistors, and counter electrodes spaced apart from the pixel electrodes and connected to the counter signal lines. To prevent leakage current from flowing from the scanning signal lines or the video signal lines to the counter signal lines, a common line is formed around a display area constituted by the pixel areas, the video signal lines and the scanning signal lines are connected to the common line by non-linear elements, and the counter signal lines are connected to the common line by high-resistance elements.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: December 25, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Suzuki, Ryoji Oritsuki, Yasushi Nakano
  • Patent number: 6226059
    Abstract: An anodized oxide film of Al is formed on a scanning signal line and a gate electrode. Al—Ta is used as material of each of the scanning signal line and gate electrode. The thickness of the anodized oxide film is set to at least 1,000 angstroms. The fabrication yield and reliability can be improved.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: May 1, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Tetsuaki Suzuki, Mitsuo Nakatani, Michio Tsukii, Akira Sasano, Saburo Oikawa, Ryoji Oritsuki
  • Patent number: 5781255
    Abstract: An anodized oxide film of Al is formed on a scanning signal line and a gate electrode. Al--Ta is used as material of each of the scanning signal line and gate electrode. The thickness of the anodized oxide film is set to 1,000 angstroms or more. The fabrication yield and reliability can be improved.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: July 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Tetsuaki Suzuki, Mitsuo Nakatani, Michio Tsukii, Akira Sasano, Saburo Oikawa, Ryoji Oritsuki
  • Patent number: 5589962
    Abstract: An anodized oxide film of Al is formed on a scanning signal line and a gate electrode. An alloy of Al containing Ta and Ti is used as material of each of the scanning signal line and gate electrode. The thickness of the anodized oxide film is set to 1,000 angstroms or more. The fabrication yield and reliability can be improved.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: December 31, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Tetsuaki Suzuki, Mitsuo Nakatani, Michio Tsukii, Akira Sasano, Saburo Oikawa, Ryoji Oritsuki
  • Patent number: 5555112
    Abstract: In a liquid crystal display substrate in which the pixel electrode is applied with a voltage through the drain and source of a thin-film transistor (TFT) that conducts by a voltage applied to the TFT gate electrode, this gate electrode and a busline connected to the gate electrode are formed as a multi-layered structure consisting of a gate layer and at least two layers of a gate insulation film and an amorphous silicon film. The multi-layered structure is formed by etching through a single mask.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: September 10, 1996
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Ryoji Oritsuki, Minoru Hiroshima, Masahiro Yanai, Masaaki Matsuda, Toshikazu Horii, Yuichi Hashimoto, Hayao Kozai, Kenkichi Suzuki, Masaru Takabatake, Takashi Isoda
  • Patent number: 4607168
    Abstract: A photosensor array device comprises a line sensor including a plurality of sets of sensors juxtaposed on a transparent glass substrate. Each set comprises an amorphous silicon photodiode, a crosstalk preventing element in the form of a diode or a transistor and a matrix wiring connected to the element. A selector is provided for driving the crosstalk preventing elements of the line sensor. The photodiode and the crosstalk preventing element are formed integrally.
    Type: Grant
    Filed: July 6, 1983
    Date of Patent: August 19, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Ryoji Oritsuki, Susumu Saito, Hiromi Kanai