Patents by Inventor Ryoko Sasaki

Ryoko Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stream processor and information processing apparatus
    Patent number: 7680962
    Abstract: An array type processor comprises a data path unit to execute processing, and a state management unit to control the state of the data path unit in accordance with a command that specifies processing on the data. An input DMA circuit reads from a memory information and data to be processed including a command corresponding to the data. The input DMA circuit first transfers the command to the state management unit, and then transfers the data to be processed to the data path unit.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: March 16, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Kenichiro Anjo, Katsumi Togawa, Ryoko Sasaki, Taro Fujii, Masato Motomura
  • Information processing apparatus
    Patent number: 7370123
    Abstract: A descriptor queue composed of descriptors containing input address information that represents an address for storing data to be processed and output address information that represents an address for storing processed data is constructed and stored in a memory. A stream processor for performing a plurality of processes parallel to each other on the data to be processed acquires a descriptor from the memory, reads data to be processed from the memory according to the input address information contained in the descriptor, processes the data, and stores the processed data back into the memory according to the output address information contained in the descriptor.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: May 6, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Kenichiro Anjo, Katsumi Togawa, Ryoko Sasaki
  • Stream processor and information processing apparatus
    Publication number: 20060161696
    Abstract: An array type processor comprises a data path unit to execute processing, and a state management unit to control the state of the data path unit in accordance with a command that specifies processing on the data. An input DMA circuit reads from a memory information and data to be processed including a command corresponding to the data. The input DMA circuit first transfers the command to the state management unit, and then transfers the data to be processed to the data path unit.
    Type: Application
    Filed: December 21, 2005
    Publication date: July 20, 2006
    Inventors: Kenichiro Anjo, Katsumi Togawa, Ryoko Sasaki, Taro Fujii, Masato Motomura
  • Information processing apparatus
    Publication number: 20060080479
    Abstract: A descriptor queue composed of descriptors containing input address information that represents an address for storing data to be processed and output address information that represents an address for storing processed data is constructed and stored in a memory. A stream processor for performing a plurality of processes parallel to each other on the data to be processed acquires a descriptor from the memory, reads data to be processed from the memory according to the input address information contained in the descriptor, processes the data, and stores the processed data back into the memory according to the output address information contained in the descriptor.
    Type: Application
    Filed: October 11, 2005
    Publication date: April 13, 2006
    Inventors: Kenichiro Anjo, Katsumi Togawa, Ryoko Sasaki