Patents by Inventor Ryosuke EBIHARA
Ryosuke EBIHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11107692Abstract: An etching method of etching a silicon nitride region with high selectivity is provided. In the etching method, a processing target object, having a silicon nitride region and a silicon-containing region having a composition different from the silicon nitride region, is accommodated in a processing vessel, and the silicon nitride region is selectively etched. In a first process, a deposit containing hydrofluorocarbon is formed on the silicon nitride region and the silicon-containing region by generating plasma of a processing gas containing a hydrofluorocarbon gas within the processing vessel. In a second process, the silicon nitride region is etched by radicals of the hydrofluorocarbon contained in the deposit. The first process and the second process are repeated alternately.Type: GrantFiled: May 2, 2017Date of Patent: August 31, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Hikaru Watanabe, Ryosuke Ebihara
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Patent number: 11063109Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: GrantFiled: March 26, 2020Date of Patent: July 13, 2021Assignee: JOLED INC.Inventors: Atsuhito Murai, Yasuhiro Terai, Takashi Maruyama, Yoshihiro Oshima, Motohiro Toyota, Ryosuke Ebihara, Yasunobu Hiromasu
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Patent number: 11018160Abstract: A thin-film transistor substrate includes a pixel circuit, an interlayer insulating film, electrodes, and a hard mask metal. The pixel circuit includes a thin film transistor. The interlayer insulating film has contact holes and covers the pixel circuit. The electrodes are exposed above a surface of the interlayer insulating film, and electrically coupled to the pixel circuit via the contact holes. The hard mask metal has openings at portions facing the contact holes and is provided on the surface of the interlayer insulating film.Type: GrantFiled: June 7, 2019Date of Patent: May 25, 2021Assignee: JOLED INC.Inventors: Ryosuke Ebihara, Yasuhiro Terai, Atsuhito Murai
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Publication number: 20200227511Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: ApplicationFiled: March 26, 2020Publication date: July 16, 2020Inventors: Atsuhito MURAI, Yasuhiro TERAI, Takashi MARUYAMA, Yoshihiro OSHIMA, Motohiro TOYOTA, Ryosuke EBIHARA, Yasunobu HIROMASU
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Publication number: 20200211854Abstract: An etching method of etching a silicon nitride region with high selectivity is provided. In the etching method, a processing target object, having a silicon nitride region and a silicon-containing region having a composition different from the silicon nitride region, is accommodated in a processing vessel, and the silicon nitride region is selectively etched. In a first process, a deposit containing hydrofluorocarbon is formed on the silicon nitride region and the silicon-containing region by generating plasma of a processing gas containing a hydrofluorocarbon gas within the processing vessel. In a second process, the silicon nitride region is etched by radicals of the hydrofluorocarbon contained in the deposit. The first process and the second process are repeated alternately.Type: ApplicationFiled: May 2, 2017Publication date: July 2, 2020Inventors: Hikaru Watanabe, Ryosuke Ebihara
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Patent number: 10644093Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: GrantFiled: August 27, 2018Date of Patent: May 5, 2020Assignee: JOLED INC.Inventors: Atsuhito Murai, Yasuhiro Terai, Takashi Maruyama, Yoshihiro Oshima, Motohiro Toyota, Ryosuke Ebihara, Yasunobu Hiromasu
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Publication number: 20200027900Abstract: A thin-film transistor substrate includes a pixel circuit, an interlayer insulating film, electrodes, and a hard mask metal. The pixel circuit includes a thin film transistor. The interlayer insulating film has contact holes and covers the pixel circuit. The electrodes are exposed above a surface of the interlayer insulating film, and electrically coupled to the pixel circuit via the contact holes. The hard mask metal has openings at portions facing the contact holes and is provided on the surface of the interlayer insulating film.Type: ApplicationFiled: June 7, 2019Publication date: January 23, 2020Inventors: Ryosuke EBIHARA, Yasuhiro TERAI, Atsuhito MURAI
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Publication number: 20190081125Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: ApplicationFiled: August 27, 2018Publication date: March 14, 2019Inventors: Atsuhito MURAI, Yasuhiro TERAI, Takashi MARUYAMA, Yoshihiro OSHIMA, Motohiro TOYOTA, Ryosuke EBIHARA, Yasunobu HIROMASU
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Publication number: 20160322218Abstract: A film forming method for forming a nitride film on a workpiece substrate accommodated within a process vessel, including: performing a first reaction of supplying a first precursor gas to the workpiece substrate accommodated within the process vessel; performing a second reaction of supplying a second precursor gas to the workpiece substrate accommodated within the process vessel; performing a modification of generating plasma of a modifying gas just above the workpiece substrate by supplying the modifying gas into the process vessel and supplying microwaves from an antenna into the process vessel, and plasma-processing, by the plasma thus generated, a surface of the workpiece substrate subjected to the first and second reactions using the first and second precursor gases.Type: ApplicationFiled: April 28, 2016Publication date: November 3, 2016Inventors: Noriaki FUKIAGE, Masahide IWASAKI, Toyohiro KAMADA, Ryosuke EBIHARA, Masanobu IGETA