Patents by Inventor Ryosuke Enomoto

Ryosuke Enomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9564765
    Abstract: In battery voltage monitoring ICs for measuring voltages of unit cells of an assembled battery, communication with a system control unit is realized in consideration of fail-safe. The system control unit and the battery voltage monitoring ICs are coupled to each other by a communication path using a daisy chain. Each battery voltage monitoring IC has a placement setting pin designating, by a binary code, a unit cell group to which the IC is coupled, in the unit cell groups. When it is detected that the Hamming distance between the code indicative of coupling to a group of the highest potential or a group of the lowest potential and a state actually set in the placement setting pin is 1, some failure such as line disconnection, short-circuit, or the like in the placement setting pins is detected, and the communication path is interrupted.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: February 7, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Akiko Fukute, Ryosuke Enomoto, Junko Kimura, Toshitaka Ukai
  • Publication number: 20160308377
    Abstract: A semiconductor device for battery control is provided with a control circuit capable of controlling turning on/off of a charging transistor provided in a charging path of a battery, a CPU capable of controlling charging of the battery via the control circuit, and a deep discharge detection circuit capable of detecting a deeply discharged state of the battery. The semiconductor device is also provided with a switch circuit which, when a deeply discharged state of the battery is detected by the deep discharge detection circuit, preferentially sends the detection result to the control circuit and, thereby, forcibly turns off the charging transistor regardless of charging control by the CPU. When a deeply discharged state of the battery is detected, the charging path of the battery is shut off to prohibit subsequent charging regardless of charging control by the CPU.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 20, 2016
    Inventors: Daisuke KATO, Ryosei MAKINO, Ryosuke ENOMOTO
  • Publication number: 20160079789
    Abstract: In a battery monitoring system included in a secondary battery, high-accuracy charge control is enabled at low cost. A semiconductor device includes: a drive unit which drives a transistor for controlling the charge current of a secondary battery and which is configured to be capable of selecting one of plural different voltages as a drive voltage (VGC) for turning on the transistor; and a data processing control unit which performs program processing. The data processing control unit generates condition information including information about the battery level of the secondary battery based on measured values of the secondary battery voltage and current and adjusts the charge current of the secondary battery by changing the drive voltage selection.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 17, 2016
    Inventors: Daisuke Kato, Ryosuke Enomoto, Lin Xing
  • Patent number: 9231419
    Abstract: In a battery monitoring system included in a secondary battery, high-accuracy charge control is enabled at low cost. A semiconductor device includes: a drive unit which drives a transistor for controlling the charge current of a secondary battery and which is configured to be capable of selecting one of plural different voltages as a drive voltage (VGC) for turning on the transistor; and a data processing control unit which performs program processing. The data processing control unit generates condition information including information about the battery level of the secondary battery based on measured values of the secondary battery voltage and current and adjusts the charge current of the secondary battery by changing the drive voltage selection.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: January 5, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Daisuke Kato, Ryosuke Enomoto, Lin Xing
  • Publication number: 20150270727
    Abstract: In battery voltage monitoring ICs for measuring voltages of unit cells of an assembled battery, communication with a system control unit is realized in consideration of fail-safe. The system control unit and the battery voltage monitoring ICs are coupled to each other by a communication path using a daisy chain. Each battery voltage monitoring IC has a placement setting pin designating, by a binary code, a unit cell group to which the IC is coupled, in the unit cell groups. When it is detected that the Hamming distance between the code indicative of coupling to a group of the highest potential or a group of the lowest potential and a state actually set in the placement setting pin is 1, some failure such as line disconnection, short-circuit, or the like in the placement setting pins is detected, and the communication path is interrupted.
    Type: Application
    Filed: September 10, 2012
    Publication date: September 24, 2015
    Inventors: Akiko Fukute, Ryosuke Enomoto, Junko Kimura, Toshitaka Ukai
  • Publication number: 20150236530
    Abstract: A semiconductor device for battery control includes a CPU, a first bus coupled to the CPU, a second bus not coupled to the CPU, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory. The semiconductor device further includes a transfer logic circuit which causes, by making the bus control circuit select the second bus, a trimming data transfer path leading from the non-volatile memory to the trimming circuit to be formed and the trimming data stored in the non-volatile memory to be transferred to the trimming circuit without involving the CPU.
    Type: Application
    Filed: April 25, 2015
    Publication date: August 20, 2015
    Inventors: Daisuke Kato, Ryosuke Enomoto
  • Patent number: 9041358
    Abstract: A semiconductor device for battery control includes a CPU, a first bus coupled to the CPU, a second bus not coupled to the CPU, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory. The semiconductor device further includes a transfer logic circuit which causes, by making the bus control circuit select the second bus, a trimming data transfer path leading from the non-volatile memory to the trimming circuit to be formed and the trimming data stored in the non-volatile memory to be transferred to the trimming circuit without involving the CPU.
    Type: Grant
    Filed: March 2, 2013
    Date of Patent: May 26, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Daisuke Kato, Ryosuke Enomoto
  • Publication number: 20140203762
    Abstract: In a battery monitoring system included in a secondary battery, high-accuracy charge control is enabled at low cost. A semiconductor device includes: a drive unit which drives a transistor for controlling the charge current of a secondary battery and which is configured to be capable of selecting one of plural different voltages as a drive voltage (VGC) for turning on the transistor; and a data processing control unit which performs program processing. The data processing control unit generates condition information including information about the battery level of the secondary battery based on measured values of the secondary battery voltage and current and adjusts the charge current of the secondary battery by changing the drive voltage selection.
    Type: Application
    Filed: November 18, 2013
    Publication date: July 24, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Daisuke Kato, Ryosuke Enomoto, Lin Xing
  • Publication number: 20130257380
    Abstract: A semiconductor device for battery control is provided with a control circuit capable of controlling turning on/off of a charging transistor provided in a charging path of a battery, a CPU capable of controlling charging of the battery via the control circuit, and a deep discharge detection circuit capable of detecting a deeply discharged state of the battery. The semiconductor device is also provided with a switch circuit which, when a deeply discharged state of the battery is detected by the deep discharge detection circuit, preferentially sends the detection result to the control circuit and, thereby, forcibly turns off the charging transistor regardless of charging control by the CPU. When a deeply discharged state of the battery is detected, the charging path of the battery is shut off to prohibit subsequent charging regardless of charging control by the CPU.
    Type: Application
    Filed: March 2, 2013
    Publication date: October 3, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Kato, Ryosei Makino, Ryosuke Enomoto
  • Publication number: 20130257379
    Abstract: A semiconductor device for battery control includes a CPU, a first bus coupled to the CPU, a second bus not coupled to the CPU, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory. The semiconductor device further includes a transfer logic circuit which causes, by making the bus control circuit select the second bus, a trimming data transfer path leading from the non-volatile memory to the trimming circuit to be formed and the trimming data stored in the non-volatile memory to be transferred to the trimming circuit without involving the CPU.
    Type: Application
    Filed: March 2, 2013
    Publication date: October 3, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Kato, Ryosuke Enomoto