Patents by Inventor Ryosuke Kaneko

Ryosuke Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250195384
    Abstract: Provided is a cosmetic suitable for high-temperature low-humidity environments. A cosmetic containing a functional polymer in which a temperature-responsive polymer and a hydrophilic polymer form an interpenetrating polymer network structure or a semi-interpenetrating polymer network structure.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 19, 2025
    Applicant: SHISEIDO COMPANY, LTD.
    Inventors: Ryosuke KANEKO, Ayano MATSUO, Atsushi SOGABE, Tsuyoshi OHTANI
  • Publication number: 20250137860
    Abstract: A pressure sensor includes: a pressure receiver having a diaphragm portion that is deformed by receiving pressure on a pressure receiving surface thereof, and a rim portion formed around and integrally with the diaphragm portion and formed to be thicker than the diaphragm portion; and a semiconductor substrate that is connected to a reverse surface of the pressure receiving surface and detects strain in the diaphragm portion by means of a resonating strain gauge. The pressure receiver is formed of ceramic. The semiconductor substrate has: a base portion provided to face the reverse surface; and a connected portion that protrudes from the base portion toward the reverse surface and has a connected surface connected to the reverse surface. The connected portion has an area smaller than an area of the base portion in a case where the pressure sensor is viewed from a direction perpendicular to the reverse surface.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 1, 2025
    Inventors: Nobuyuki Hamamatsu, Hiroshi YOKOUCHI, Ryosuke KANEKO, Takashi YOSHIDA
  • Patent number: 11489149
    Abstract: An aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer contains a filler and a first binder, and a content of the first binder in the insulating layer is 8% by mass or more. Another aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer is a dry coating product containing a filler and a binder. Still another aspect of the present invention is a method for manufacturing an electrode, which includes the steps of forming an active material layer, and laminating an insulator containing a filler and a binder on a surface of the active material layer to form an insulating layer, in which the insulator does not contain a solvent.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: November 1, 2022
    Assignee: GS Yuasa International Ltd.
    Inventors: Ryosuke Kaneko, Tetsuya Murai
  • Publication number: 20220302436
    Abstract: An aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer contains a filler and a first binder, and a content of the first binder in the insulating layer is 8% by mass or more. Another aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer is a dry coating product containing a filler and a binder. Still another aspect of the present invention is a method for manufacturing an electrode, which includes the steps of forming an active material layer, and laminating an insulator containing a filler and a binder on a surface of the active material layer to form an insulating layer, in which the insulator does not contain a solvent.
    Type: Application
    Filed: June 3, 2022
    Publication date: September 22, 2022
    Inventors: Ryosuke KANEKO, Tetsuya MURAI
  • Patent number: 11374225
    Abstract: In an electrode having a covering layer stacked on a composite layer, an increase in resistance of the electrode is suppressed. An electrode plate includes a composite layer including active material particles and a covering layer including filler particles stacked on the composite layer. In this electrode plate, a particle size (D30) of the active material particle is set to be equal to or smaller than a particle size (D50) of the filler particle.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: June 28, 2022
    Assignee: GS Yuasa International Ltd.
    Inventors: Ryosuke Kaneko, Masashi Demizu, Tetsuya Murai
  • Patent number: 11018151
    Abstract: A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips located over a substrate, generally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction by width-modulated line trenches, memory films located on a respective sidewall of the alternating stacks, the memory films containing a charge storage layer and blocking dielectric which generally extend along the first horizontal direction and laterally undulate along the second horizontal direction, and a plurality of discrete vertical semiconductor channels located on a sidewall of a respective one of the memory films.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 25, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Ryosuke Kaneko
  • Patent number: 10985171
    Abstract: A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips located over a substrate, generally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction by width-modulated line trenches, memory films located on a respective sidewall of the alternating stacks, generally extending along the first horizontal direction, and laterally undulating along the second horizontal direction, and a plurality of discrete vertical semiconductor channels located on a sidewall of a respective one of the memory films.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: April 20, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Ryosuke Kaneko
  • Patent number: 10923496
    Abstract: An alternating stack of insulating layers and spacer material layers is formed over a source-level sacrificial layer overlying a substrate. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory stack structures including a respective vertical semiconductor channel and a respective memory film are formed through the alternating stack. A source-level cavity is formed by removing the source-level sacrificial layer. Semiconductor pillar structures may be used to provide mechanical support to the alternating stack during formation of the source-level cavity. A source-level semiconductor material layer can be formed in the source-level cavity. The source-level semiconductor material layer adjoins bottom end portions of the vertical semiconductor channels and laterally surrounds the semiconductor pillar structures.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: February 16, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Mitsuteru Mushiga, Kenji Sugiura, Akio Nishida, Ryosuke Kaneko, Michiaki Sano
  • Publication number: 20200335793
    Abstract: In an electrode having a covering layer stacked on a composite layer, an increase in resistance of the electrode is suppressed. An electrode plate includes a composite layer including active material particles and a covering layer including filler particles stacked on the composite layer. In this electrode plate, a particle size (D30) of the active material particle is set to be equal to or smaller than a particle size (D50) of the filler particle.
    Type: Application
    Filed: October 6, 2017
    Publication date: October 22, 2020
    Inventors: Ryosuke KANEKO, Masashi DEMIZU, Tetsuya MURAI
  • Publication number: 20200219895
    Abstract: An alternating stack of insulating layers and spacer material layers is formed over a source-level sacrificial layer overlying a substrate. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory stack structures including a respective vertical semiconductor channel and a respective memory film are formed through the alternating stack. A source-level cavity is formed by removing the source-level sacrificial layer. Semiconductor pillar structures may be used to provide mechanical support to the alternating stack during formation of the source-level cavity. A source-level semiconductor material layer can be formed in the source-level cavity. The source-level semiconductor material layer adjoins bottom end portions of the vertical semiconductor channels and laterally surrounds the semiconductor pillar structures.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 9, 2020
    Inventors: Mitsuteru MUSHIGA, Kenji SUGIURA, Akio NISHIDA, Ryosuke KANEKO, Michiaki SANO
  • Publication number: 20200152969
    Abstract: An aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer contains a filler and a first binder, and a content of the first binder in the insulating layer is 8% by mass or more. Another aspect of the present invention is an electrode which includes an active material layer, and an insulating layer layered on a surface of the active material layer, in which the insulating layer is a dry coating product containing a filler and a binder. Still another aspect of the present invention is a method for manufacturing an electrode, which includes the steps of forming an active material layer, and laminating an insulator containing a filler and a binder on a surface of the active material layer to form an insulating layer, in which the insulator does not contain a solvent.
    Type: Application
    Filed: July 17, 2018
    Publication date: May 14, 2020
    Inventors: Ryosuke KANEKO, Tetsuya MURAI
  • Publication number: 20200098787
    Abstract: A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips located over a substrate, generally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction by width-modulated line trenches, memory films located on a respective sidewall of the alternating stacks, the memory films containing a charge storage layer and blocking dielectric which generally extend along the first horizontal direction and laterally undulate along the second horizontal direction, and a plurality of discrete vertical semiconductor channels located on a sidewall of a respective one of the memory films.
    Type: Application
    Filed: May 28, 2019
    Publication date: March 26, 2020
    Inventor: Ryosuke KANEKO
  • Publication number: 20200098773
    Abstract: A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips located over a substrate, generally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction by width-modulated line trenches, memory films located on a respective sidewall of the alternating stacks, generally extending along the first horizontal direction, and laterally undulating along the second horizontal direction, and a plurality of discrete vertical semiconductor channels located on a sidewall of a respective one of the memory films.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventor: Ryosuke Kaneko
  • Patent number: 10512277
    Abstract: An object of the present invention is to provide an unfermented beer-taste beverage which has an appearance with foam like beer, but does not have the characteristic odor common to beers and non-alcohol beer-taste beverages associated with fermentation; an unfermented beer-taste beverage containing a soybean dietary fiber does not have the characteristic odor common to general beers and non-alcohol beer-taste beverages associated with fermentation; when the beer-taste beverage is poured into a glass or the like, a beer-like foam with a good appearance can be formed; the foam arising from the glass is a fine and minute foam like champagne, and the foam arises linearly; in addition, the beer-like foam makes the mouthfeel smooth, and further provides a texture.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: December 24, 2019
    Assignee: ASAHI BREWERIES, LTD.
    Inventors: Ryosuke Kaneko, Shinsuke Ito
  • Patent number: 9679907
    Abstract: A portion of a charge trapping layer adjacent to a select drain gate electrode can be removed employing a differential-rate etch process that provides an accelerated etch rate to a doped portion with respect to an undoped portion. If a silicon nitride layer is employed as the charge trapping layer, then angled ion implantation of boron atoms to an upper portion of the silicon nitride layer can increase the etch rate of the boron-doped portion of the silicon nitride layer in phosphoric acid. The charge trapping layer is etched back such that a remaining portion of the charge trapping layer can be present only at levels of control gate electrodes, and absent at each level of select drain gate electrodes. Threshold voltage shift for the select drain gate electrodes can be eliminated or reduced by removal of the charge trapping layer at each level of the select drain gate electrodes.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: June 13, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Ryosuke Kaneko
  • Publication number: 20170099860
    Abstract: An object of the present invention is to provide an unfermented beer-taste beverage which has an appearance with foam like beer, but does not have the characteristic odor common to beers and non-alcohol beer-taste beverages associated with fermentation; an unfermented beer-taste beverage containing a soybean dietary fiber does not have the characteristic odor common to general beers and non-alcohol beer-taste beverages associated with fermentation; when the beer-taste beverage is poured into a glass or the like, a beer-like foam with a good appearance can be formed; the foam arising from the glass is a fine and minute foam like champagne, and the foam arises linearly; in addition, the beer-like foam makes the mouthfeel smooth, and further provides a texture.
    Type: Application
    Filed: December 23, 2016
    Publication date: April 13, 2017
    Inventors: Ryosuke Kaneko, Shinsuke Ito
  • Publication number: 20140170295
    Abstract: An object of the present invention is to provide an unfermented beer-taste beverage which has an appearance with foam like beer, but does not have the characteristic odor common to beers and non-alcohol beer-taste beverages associated with fermentation; an unfermented beer-taste beverage containing a soybean dietary fiber does not have the characteristic odor common to general beers and non-alcohol beer-taste beverages associated with fermentation; when the beer-taste beverage is poured into a glass or the like, a beer-like foam with a good appearance can be formed; the foam arising from the glass is a fine and minute foam like champagne, and the foam arises linearly; in addition, the beer-like foam makes the mouthfeel smooth, and further provides a texture.
    Type: Application
    Filed: June 6, 2012
    Publication date: June 19, 2014
    Applicant: ASAHI BREWERIES, LTD.
    Inventors: Ryosuke Kaneko, Shinsuke Ito