Patents by Inventor Ryosuke Matsubara

Ryosuke Matsubara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11372552
    Abstract: To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: June 28, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Makio Mizuno, Kentaro Shimada, Ryosuke Matsubara, Midori Kurokawa
  • Patent number: 10983712
    Abstract: A storage control system acquires, for each of a plurality of power control groups in which a plurality of storage devices which form the basis of a plurality of redundancy configuration groups are classified, an I/O (Input/Output) amount of the power control group. For each of the plurality of power control groups, the storage control system controls power consumption of each of the storage devices belonging to the power control group in power control group units, based on the acquired I/O amount relating to the power control group. None of the plurality of redundancy configuration groups spans two or more power control groups among the plurality of power control groups, all being contained in any of the plurality of power control groups.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: April 20, 2021
    Assignee: HITACHI, LTD.
    Inventor: Ryosuke Matsubara
  • Publication number: 20210109661
    Abstract: To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
    Type: Application
    Filed: December 18, 2020
    Publication date: April 15, 2021
    Inventors: Makio MIZUNO, Kentaro SHIMADA, Ryosuke MATSUBARA, Midori KUROKAWA
  • Patent number: 10942815
    Abstract: A storage control system to provide file-level storage and block-level storage services. The storage control system has a computer system including a second I/O unit configured to receive block-level storage related requests, a processor unit, a first memory unit, and a storage unit; and a programmable logic device including a first I/O unit configured to receive file-level storage related requests, an interface unit configured to communicate with the computer system, one or more programmable hardware-implemented processing units and for processing of file-level storage related requests, and a second memory unit.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: March 9, 2021
    Assignees: HITACHI, LTD., HITACHI VANTARA LLC
    Inventors: Sathisha Poojary, Christopher James Aston, Graham Ellement, Simon Carl Johnson, Hiroyuki Mitome, Naoki Inoue, Norimitsu Hayakawa, Yukari Hatta, Yasuo Hirata, Ryosuke Matsubara
  • Publication number: 20210034250
    Abstract: To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
    Type: Application
    Filed: March 13, 2020
    Publication date: February 4, 2021
    Inventors: Makio MIZUNO, Kentaro SHIMADA, Ryosuke MATSUBARA, Midori KUROKAWA
  • Patent number: 10901626
    Abstract: To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: January 26, 2021
    Assignee: HITACHI, LTD.
    Inventors: Makio Mizuno, Kentaro Shimada, Ryosuke Matsubara, Midori Kurokawa
  • Publication number: 20190384513
    Abstract: A storage control system acquires, for each of a plurality of power control groups in which a plurality of storage devices which form the basis of a plurality of redundancy configuration groups are classified, an I/O (Input/Output) amount of the power control group. For each of the plurality of power control groups, the storage control system controls power consumption of each of the storage devices belonging to the power control group in power control group units, based on the acquired I/O amount relating to the power control group. None of the plurality of redundancy configuration groups spans two or more power control groups among the plurality of power control groups, all being contained in any of the plurality of power control groups.
    Type: Application
    Filed: March 15, 2019
    Publication date: December 19, 2019
    Applicant: HITACHI, LTD.
    Inventor: Ryosuke MATSUBARA
  • Patent number: 10053435
    Abstract: The present invention provides: a furoxan compound having a fluorine atom as a substituent group on the ring structure thereof; and a novel nitric oxide donor including the compound. The present invention relates to a fluorofuroxan compound represented by general formula (1) or (2). The compound of formula (1) can be manufactured by reacting a fluoride salt with a nitrofuroxan compound to substitute the nitro group with a fluoro group. The compound of formula (2) can be manufactured by subjecting the compounds of formula (1) to isomerization by irradiation with light.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: August 21, 2018
    Assignee: NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITY
    Inventors: Ryosuke Matsubara, Akihiro Ando, Masahiko Hayashi
  • Publication number: 20180137013
    Abstract: A storage control system to provide file-level storage and block-level storage services. The storage control system has a computer system including a second 1/0 unit configured to receive block-level storage related requests, a processor unit, a first memory unit, and a storage unit; and a programmable logic device including a first 1/0 unit configured to receive file-level storage related requests, an interface unit configured to communicate with the computer system, one or more programmable hardware-implemented processing units and for processing of file-level storage related requests, and a second memory unit.
    Type: Application
    Filed: July 9, 2015
    Publication date: May 17, 2018
    Inventors: Sathisha POOJARY, Christopher James ASTON, Graham ELLEMENT, Simon Carl JOHNSON, Hiroyuki MITOME, Naoki INOUE, Norimitsu HAYAKAWA, Yukari HATTA, Yasuo HIRATA, Ryosuke MATSUBARA
  • Publication number: 20180009771
    Abstract: The present invention provides: a furoxan compound having a fluorine atom as a substituent group on the ring structure thereof; and a novel nitric oxide donor including the compound. The present invention relates to a fluorofuroxan compound represented by general formula (1) or (2). The compound of formula (1) can be manufactured by reacting a fluoride salt with a nitrofuroxan compound to substitute the nitro group with a fluoro group. The compound of formula (2) can be manufactured by subjecting the compounds of formula (1) to isomerization by irradiation with light.
    Type: Application
    Filed: December 15, 2015
    Publication date: January 11, 2018
    Inventors: Ryosuke Matsubara, Akihiro Ando, Masahiko Hayashi
  • Patent number: 9575855
    Abstract: A storage apparatus has a redundant configuration equipped with a plurality of components and includes a first controller and second controller, wherein the first controller is provided with a first processor and a third processor for monitoring the first controller; wherein the second controller is provided with a second processor and a fourth processor for monitoring the second controller; wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path; and wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: February 21, 2017
    Assignee: HITACHI, LTD.
    Inventors: Toru Maeda, Ryosuke Matsubara
  • Publication number: 20160179641
    Abstract: A storage apparatus has a redundant configuration equipped with a plurality of components and includes a first controller and second controller, wherein the first controller is provided with a first processor and a third processor for monitoring the first controller; wherein the second controller is provided with a second processor and a fourth processor for monitoring the second controller; wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path; and wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location.
    Type: Application
    Filed: September 6, 2013
    Publication date: June 23, 2016
    Applicant: HITACHI, LTD.
    Inventors: Toru MAEDA, Ryosuke MATSUBARA
  • Patent number: 9201601
    Abstract: A storage system which is connected to a host computer, includes a storage device; a first controller which controls data transfers between the storage device and the host computer; a second controller connected to the first controller and controls data transfers between the storage device and the host computer; a non-volatile memory; and a battery device. The first controller includes a first volatile memory and the second controller comprising a second volatile memory. Upon a power outage, the battery device starts supplying electric power to the first controller and the second controller, and wherein the second controller copies data which is stored in the first volatile memory to the second volatile memory and, after copying is complete, stops operation of the first controller, stops the power supply from the battery device to the first controller, and copies data.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: December 1, 2015
    Assignee: HITACHI, LTD.
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Toru Maeda
  • Publication number: 20150293714
    Abstract: A storage system which is connected to a host computer, includes a storage device; a first controller which controls data transfers between the storage device and the host computer; a second controller connected to the first controller and controls data transfers between the storage device and the host computer; a non-volatile memory; and a battery device. The first controller includes a first volatile memory and the second controller comprising a second volatile memory. Upon a power outage, the battery device starts supplying electric power to the first controller and the second controller, and wherein the second controller copies data which is stored in the first volatile memory to the second volatile memory and, after copying is complete, stops operation of the first controller, stops the power supply from the battery device to the first controller, and copies data.
    Type: Application
    Filed: May 30, 2013
    Publication date: October 15, 2015
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Toru Maeda
  • Patent number: 8904201
    Abstract: At the time of a fan failure of a plurality of fans for cooling redundant controllers, data loss can be avoided even if a power source of each controller is controlled. A storage system includes: a first controller for controlling a first power source; a plurality of first fans for cooling the first controller; a second controller for controlling a second power source; a plurality of second fans for cooling the second controller; and a storage device including a plurality of storage units; wherein if a fan failure of the first fans occurs, the first controller controls the first power source in a standby state on condition that the second controller is in a normal state; and if the second power source is in the standby state, the first controller executes destaging processing and then controls the first power source in the standby state.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: December 2, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Shohei Shimahara
  • Publication number: 20130080796
    Abstract: At the time of a fan failure of a plurality of fans for cooling redundant controllers, data loss can be avoided even if a power source of each controller is controlled. A storage system includes: a first controller for controlling a first power source; a plurality of first fans for cooling the first controller; a second controller for controlling a second power source; a plurality of second fans for cooling the second controller; and a storage device including a plurality of storage units; wherein if a fan failure of the first fans occurs, the first controller controls the first power source in a standby state on condition that the second controller is in a normal state; and if the second power source is in the standby state, the first controller executes destaging processing and then controls the first power source in the standby state.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Shohei Shimahara
  • Publication number: 20120029241
    Abstract: The method for producing a carbonyl compound according to the invention comprises a step of obtaining a carbonyl compound by oxidation of a secondary alcohol in the presence of a catalyst, wherein the catalyst comprises a carrier obtained by the use of a styrene-based polymer with side chains containing crosslinkable functional groups, wherein the crosslinkable functional groups in the carrier are crosslinked, gold-platinum nanosize clusters supported on the carrier and carbon black supported on the carrier. The production method allows production of a carbonyl compound by oxidation of a secondary alcohol, with high selectivity and a high conversion rate.
    Type: Application
    Filed: March 3, 2010
    Publication date: February 2, 2012
    Applicants: THE UNIVERSITY OF TOKYO, JX NIPPON OIL & ENERGY CORPORATION
    Inventors: Shu Kobayashi, Ryosuke Matsubara, Hiroyuki Miyamura, Jun Yamada
  • Publication number: 20110282963
    Abstract: Disclosed is a storage device 10 in which CPUs 132 are redundantly configured, and which is thus capable of performing dual-writing of data into cache memories 134 respectively coupled to the CPUs 132. In the storage device 10, general-purpose processors each including an NTB_Port 72, PCI_Ports 73 and a Memory_I/F 74 are used as CPUs 132 of the CPUs 132. In the storage device 10, when a first PCIe_Port 73 determines not to perform the dual-writing, a first NTB_Port 1322 writes data into only one of the cache memories 134, and when the first PCIe_Port 73 determines to perform the dual-writing, the first NTB_Port 1322 writes data into one of the cache memories 134 while writing the data into the other one of the cache memories 134 via the other one of the CPUs 132.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Applicant: HITACHI, LTD.
    Inventors: Shohei Shimahara, Hiroki Kanai, Ryosuke Matsubara
  • Publication number: 20110167189
    Abstract: By writing a command for transferring data from a first cluster to a second cluster and the second cluster writing data that was requested from the first cluster based on the command into the first cluster, data can be transferred in real time from the second cluster to the first cluster without having to issue a read request from the first cluster to the second cluster.
    Type: Application
    Filed: November 17, 2009
    Publication date: July 7, 2011
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Shogei Shimahara
  • Publication number: 20090240876
    Abstract: Provided is an information processing apparatus including a local memory for storing a control program, a flash memory for storing a boot program, a processor for controlling the overall controller, a chipset for relaying the transfer of data among the respective components, and a logical control circuit arranged between the chipset and the flash memory. The logical control circuit performs information conversion processing to accommodate the logical configuration of the chipset and the flash memory when sending and receiving information between the chipset and the flash memory. This information conversion processing includes the steps of translating a serial address signal output from the chipset into a parallel address signal, translating a serial data signal output from the chipset into a parallel data signal, and translating a parallel data signal output from the flash memory into a serial data signal.
    Type: Application
    Filed: May 19, 2008
    Publication date: September 24, 2009
    Inventors: Takahide Okuno, Tatsuya Sumino, Mitsuhide Sato, Ryosuke Matsubara