Abstract: A semiconductor device includes a vertical metal-oxide semiconductor (MOS) transistor that includes: first trenches provided from an upper surface of a low-concentration impurity layer and penetrating through a body region, and extending in a first direction; and second trenches provided from the upper surface of the low-concentration impurity layer and penetrating through the body region to a depth deeper than the depth of the first trenches, and extending in the first direction. The first trenches and the second trenches are alternately disposed in a second direction, first conductors connected to a gate electrode are provided inside the first trenches and in upper portions inside the second trenches, second conductors connected to the source electrode are provided in lower portions inside the second trenches, and a pitch between the second conductors is twice a pitch between the first conductors in the second direction.

Abstract: A semiconductor device includes: a vertical metal-oxide semiconductor (MOS) transistor. In a plan view, an active region of the vertical MOS transistor includes unit cells repeatedly arranged within a plane of the active region, each unit cell is a hexagon having a perimeter defined along center positions of a width of a gate trench, in each unit cell, a shape of the body contact region exposed at the upper surface of a low-concentration impurity layer has a center that coincides with a center of the unit cell and rotational symmetry of 60° or less in a clockwise direction, and Lxm/3?Lxr?Lxm is satisfied, where Lxr ?m denotes the width of the gate trench, and Lxm ?m denotes a distance between parallel portions of the gate trench that face each other.

Abstract: A semiconductor device includes: a semiconductor layer that includes a semiconductor substrate on a back face side and is divided into a first region, a second region, and a third region that do not overlap each other and are not dispersedly disposed in a plan view of the semiconductor device; a first vertical metal-oxide-semiconductor (MOS) transistor provided in the first region of the semiconductor layer; a second vertical MOS transistor provided in the second region of the semiconductor layer; and a drain pad connected to the semiconductor substrate, at a position within the third region in the plan view of the semiconductor device. In the plan view of the semiconductor device, the third region is interposed between the first region and the second region. In the plan view of the semiconductor device, an area of the first region is larger than an area of the second region.

Abstract: A semiconductor device includes a vertical metal-oxide semiconductor (MOS) transistor that includes: first trenches provided from an upper surface of a low-concentration impurity layer and penetrating through a body region, and extending in a first direction; and second trenches provided from the upper surface of the low-concentration impurity layer and penetrating through the body region to a depth deeper than the depth of the first trenches, and extending in the first direction. The first trenches and the second trenches are alternately disposed in a second direction, first conductors connected to a gate electrode are provided inside the first trenches and in upper portions inside the second trenches, second conductors connected to the source electrode are provided in lower portions inside the second trenches, and a pitch between the second conductors is twice a pitch between the first conductors in the second direction.

Abstract: A semiconductor device includes a vertical field-effect transistor including: a first gate trench and a second gate trench extending in a first direction, the second gate trench being deeper than the first trench; a first gate insulating film and a first gate conductor inside the first gate trench; and a second gate insulating film and a second gate conductor inside the second gate trench. The first gate conductor and the second gate conductor have the same potential. When a total number of first gate trenches is denoted by n, a total number of second gate trenches is at least 2 and at most n+1. In a second direction orthogonal to the first direction, the second gate trench is disposed at each of farthest ends of a region in which the first gate trenches and the second gate trenches are disposed.

Abstract: A semiconductor device includes a vertical field-effect transistor including: a first gate trench and a second gate trench extending in a first direction, the second gate trench being deeper than the first trench; a first gate insulating film and a first gate conductor inside the first gate trench; and a second gate insulating film and a second gate conductor inside the second gate trench. The first gate conductor and the second gate conductor have the same potential. When a total number of first gate trenches is denoted by n, a total number of second gate trenches is at least 2 and at most n +1. In a second direction orthogonal to the first direction, the second gate trench is disposed at each of farthest ends of a region in which the first gate trenches and the second gate trenches are disposed.

Abstract: A semiconductor device includes a vertical field-effect transistor including: a low-concentration impurity layer; a body region; a gate trench; a gate insulating film; and a gate conductor. The body region includes: a first body portion containing an active region and has a constant depth; and a second body portion adjacent to the first body portion and includes a zone that has a limited length in a second direction orthogonal to the first direction along the top surface of the low-concentration impurity layer, and has a constant depth at a position shallower than the constant depth of the first body portion. The second body portion includes a portion in which a region having relatively high concentration of an impurity and a region having relatively low concentration of an impurity are alternately and periodically present in the first direction in a cross-sectional view of a plane orthogonal to the second direction.

Abstract: A semiconductor device includes a vertical field-effect transistor including: a low-concentration impurity layer; a body region; a gate trench; a gate insulating film; and a gate conductor. The body region includes: a first body portion containing an active region and has a constant depth; and a second body portion adjacent to the first body portion and includes a zone that has a limited length in a second direction orthogonal to the first direction along the top surface of the low-concentration impurity layer, and has a constant depth at a position shallower than the constant depth of the first body portion. The second body portion includes a portion in which a region having relatively high concentration of an impurity and a region having relatively low concentration of an impurity are alternately and periodically present in the first direction in a cross-sectional view of a plane orthogonal to the second direction.

Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.

Abstract: Provided is a first vertical field effect transistor in which first source regions and first connection portions via which a first body region is connected to a first source electrode are disposed alternately and cyclically in a first direction in which first trenches extend. In a second direction orthogonal to the first direction, Lxm?Lxr?0.20 ?m holds true where Lxm denotes a distance between adjacent first trenches and Lxr denotes the inner width of a first trench. The lengths of the first connection portions are in a convergence region in which the on-resistance of the vertical field effect transistor at the time when a voltage having a specification value is applied to first gate conductors to supply current having a specification value does not decrease noticeably even when the lengths of the first connection portions are made much shorter.

Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.

Abstract: Provided is a first vertical field effect transistor in which first source regions and first connection portions via which a first body region is connected to a first source electrode are disposed alternately and cyclically in a first direction in which first trenches extend. In a second direction orthogonal to the first direction, Lxm?Lxr?0.20 ?m holds true where Lxm denotes a distance between adjacent first trenches and Lxr denotes the inner width of a first trench. The lengths of the first connection portions are in a convergence region in which the on-resistance of the vertical field effect transistor at the time when a voltage having a specification value is applied to first gate conductors to supply current having a specification value does not decrease noticeably even when the lengths of the first connection portions are made much shorter.

Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.

Abstract: Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode.

Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.