Patents by Inventor Ryosuke Tatsumi

Ryosuke Tatsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11093134
    Abstract: To combine and apply a data volume reduction technique and an automatic tier management function, the invention provides a storage system that includes a processor and a storage medium and manages and stores data in tiers. The storage system includes a first storage tier that includes a storage area for storing data, and a second storage tier that includes a storage area for storing the data which is stored in the storage area of the first storage tier and whose storage area is changed. The processor calculates an I/O volume of the data in the first storage tier, determines the tier where data is stored based on the I/O volume, and physically stores data which is stored in the second storage tier in a storage medium corresponding to the determined tier.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: August 17, 2021
    Assignee: HITACHI, LTD.
    Inventors: Kazuki Matsugami, Tomohiro Yoshihara, Ryosuke Tatsumi
  • Patent number: 11086562
    Abstract: In a case where updated data using a first logical address as a write destination and existing data using a second logical address as a write destination duplicate with each other, a computer system writes predetermined data instead of updated data to a memory segment associated with a first physical address, and dynamically maps the first logical address to a second physical address. The computer system transmits a write command of the predetermined data or an unmapping command that designates a virtual address that complies with the first physical address, to a storage device that corresponds to the first physical address. The first and second logical addresses are logical addresses that belong to a logical address range which is at least a part of a logical address space. The first physical address is a physical address that belongs to a physical address range which is at least a part of a physical address space, and is a physical address statically mapped to the first logical address.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: August 10, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Ryosuke Tatsumi, Tomohiro Yoshihara
  • Publication number: 20210243082
    Abstract: In a distributed computing system, a bottleneck for performance of a network is avoided and a high-performance scalable resource management function is achieved. The distributed computing system includes a plurality of components connected to each other via a network. Each of the components includes a plurality of compute nodes, a plurality of drive casings, and a plurality of storage devices. The network includes a plurality of network switches and is configured in layers. When a storage region is to be allocated to a compute node among the compute nodes, a managing unit selects, from the storage devices, a storage device related to the storage region to be allocated or selects, from the drives, a drive casing related to the storage region to be allocated, based on a network distance between two of the compute node, the storage device, and the drive casing.
    Type: Application
    Filed: September 9, 2020
    Publication date: August 5, 2021
    Inventors: Ryosuke TATSUMI, Akira YAMAMOTO, Shugo OGAWA, Yoshinori OHIRA, Koji HOSOGI
  • Patent number: 11080192
    Abstract: The storage system includes a first partition which is associated with a first processor and in which the first processor temporarily stores data relating to I/O requests processed by the first processor; and a second partition which is associated with a second processor and in which the second processor temporarily stores data relating to I/O requests processed by the second processor. Each processor independently controls the size of the first partition of the first cache memory and the size of the first partition of the second cache memory, and also independently controls the size of the second partition of the first cache memory and the size of the second partition of the second cache memory.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: August 3, 2021
    Assignee: HITACHI, LTD.
    Inventors: Ryosuke Tatsumi, Shintaro Ito, Masakuni Agetsuma
  • Publication number: 20210191623
    Abstract: To improve the performance of storage systems. A plurality of controllers monitor a transfer amount of each path of a plurality of host paths and a plurality of drive paths in a logical volume; estimate changes of a host path and a drive path after a change of the priority of the plurality of host paths, and estimate the transfer amount of each path of the plurality of host paths and the plurality of drive paths after the change of the priority on a basis of the estimated changes of the host path and the drive path, and the monitored transfer amount of each path; and change the priority of the plurality of host paths on a basis of the estimated transfer amount of each path such that the transfer amount of each path satisfies a predetermined condition.
    Type: Application
    Filed: September 4, 2020
    Publication date: June 24, 2021
    Applicant: Hitachi, Ltd.
    Inventors: Ryosuke Tatsumi, Naruki Kurata
  • Publication number: 20210194959
    Abstract: A possible performance bottleneck associated with insufficient network bands is mitigated to allow improvement of access performance of a storage system. A storage system includes a first node with a storage medium of storage and a plurality of second nodes each with a controller function for the storage, and is communicatively connected to a host providing an access request to the storage. One of the plurality of second nodes is determined to be a node to which a controller function executing access processing on the storage is assigned on the basis of a first amount of data transfer between the second node and the host and a second amount of data transfer between the second node and the first node.
    Type: Application
    Filed: September 11, 2020
    Publication date: June 24, 2021
    Inventors: Shugo OGAWA, Ryosuke TATSUMI, Yoshinori OHIRA, Koji HOSOGI
  • Publication number: 20210165753
    Abstract: An object of the present invention is to properly secure the consistency of data while suppressing a processing load of a controller on a processor. A storage system includes a plurality of controllers and an HCA that can directly access a memory and can communicate with the controllers. The controller includes a CPU, and a memory having a buffer region into which data is temporarily stored and a cache region into which data is cached. In the case where new data according to a write request is stored into the buffer region, the CPU of the controller sequentially transfers the new data to the cache regions using the HCA without passing through the other buffer regions.
    Type: Application
    Filed: February 8, 2021
    Publication date: June 3, 2021
    Inventors: Yuto KAMO, Ryosuke TATSUMI, Tomohiro YOSHIHARA, Takashi NAGAO
  • Patent number: 10936518
    Abstract: An object of the present invention is to properly secure the consistency of data while suppressing a processing load of a controller on a processor. A storage system includes a plurality of controllers and an HCA that can directly access a memory and can communicate with the controllers. The controller includes a CPU, and a memory having a buffer region into which data is temporarily stored and a cache region into which data is cached. In the case where new data according to a write request is stored into the buffer region, the CPU of the controller sequentially transfers the new data to the cache regions using the HCA without passing through the other buffer regions.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: March 2, 2021
    Assignee: HITACHI, LTD.
    Inventors: Yuto Kamo, Ryosuke Tatsumi, Tomohiro Yoshihara, Takashi Nagao
  • Publication number: 20210042032
    Abstract: A storage system for continuing I/O without affecting drive box addition to a host computer includes: a plurality of drive boxes for connecting to a computer device that transmits commands for data reads or writes; and a storage controller connected to the drive boxes. A first drive box provides a first storage region to the computer device. The storage controller manages correspondence between the first storage region and a physical storage region of the drives constituting the first storage region. The first drive box receives a command for the first storage region from the computer device and transfers the command to the storage controller. The storage controller generates a data transfer command including a data storage destination based on the address management table, and transfers the command to the first drive box. The first drive box then transfers the data transfer command to the second drive box.
    Type: Application
    Filed: March 5, 2020
    Publication date: February 11, 2021
    Applicant: Hitachi, Ltd.
    Inventors: Nobuhiro YOKOI, Hirotoshi AKAIKE, Ryosuke TATSUMI, Koji HOSOGI, Akira YAMAMOTO
  • Publication number: 20210034482
    Abstract: A storage system includes a first storage controller including a plurality of main storage media and one or more processor cores, and a second storage controller including a plurality of main storage media and one or more processor cores and performing communication with the first storage controller. Storage areas of the main storage media in the first storage controller are allocated to an address map. In response to the occurrence of failures in one or mode main storage media of the main storage media of the first storage controller, the first storage controller performs restarting to reallocate the storage areas of the main storage media excluding one or more main storage media having caused the failures to an address map reduced than before the occurrence of the failures. The second storage controller continues operating during the restarting of the first storage controller.
    Type: Application
    Filed: March 17, 2020
    Publication date: February 4, 2021
    Applicant: Hitachi, Ltd.
    Inventors: Yoshiaki DEGUCHI, Naoya OKADA, Ryosuke TATSUMI, Kentaro SHIMADA, Sadahiro SUGIMOTO
  • Patent number: 10884924
    Abstract: A storage system receives a write request which specifies a logical volume address associated with a RAID group, and makes a first determination whether write target data in accordance with the write request exists in a cache memory. When the first determination result is negative, the storage system makes a second determination whether at least one of one or more conditions is met, the condition being that random write throughput performance is expected to increase by asynchronous de-staging processing of storing the write target data in the RAID group asynchronously to write processing performed in response to the write request. When the second determination result is negative, the storage system selects, for the write request, synchronous storage processing, which is processing of storing the write target data in the RAID group in the write processing and for which a load on a processor is lower than the asynchronous de-staging processing.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: January 5, 2021
    Assignee: HITACHI, LTD.
    Inventors: Shintaro Ito, Akira Yamamoto, Ryosuke Tatsumi, Takanobu Suzuki
  • Publication number: 20200310975
    Abstract: A storage system includes a plurality of controllers and a plurality of storage drives. A first cache area and a second cache area are set in a memory. The first cache area is permitted to be written data by the plurality of storage drives, and the second cache area is not permitted to be written data by the plurality of storage drives. In a case where the plurality of controllers duplicates data stored in the cache area to a cache area of another controller for redundancy, the plurality of controllers causes the data to be redundant in a second cache area of the other controller in a case where the data is stored in the first cache area, and causes the data to be redundant in a first cache area of the other controller in a case where the data is stored in the second cache area.
    Type: Application
    Filed: September 12, 2019
    Publication date: October 1, 2020
    Inventors: Naoya OKADA, Tomohiro YOSHIHARA, Takashi NAGAO, Ryosuke TATSUMI
  • Publication number: 20200272359
    Abstract: To improve performance of a storage system. The storage system includes a plurality of storage nodes that communicate via a network. Each of the plurality of storage nodes includes one or more controllers. At least one controller in the controllers specifies at least two controllers that allocate a cache sub-area where write data is stored based on a controller that receives the write data from a host and a controller that processes the write date, and the cache sub-area is allocated in the specified controllers.
    Type: Application
    Filed: August 27, 2019
    Publication date: August 27, 2020
    Inventors: Masahiro TSURUYA, Tomohiro YOSHIHARA, Ryosuke TATSUMI, Shinsuke IZAWA
  • Patent number: 10739999
    Abstract: A computer system connected to an external computer issuing a data input/output request and a storage device, includes a logical storage area of a first layer of the storage device and a logical storage area of a second layer of the external computer. The logical storage area of the first layer includes a common area and an individual area. A storage area of the common area is associated with one or more of the second layer's logical storage areas. A storage area of the individual area is associated with one storage area of the second layer's logical storage area. The computer system performs duplication determination on a plurality of data sets and associates a plurality of data sets determined as being duplicated with the common area to associate the storage area of the common area with a plurality of storage areas of the logical storage area of the second layer.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: August 11, 2020
    Assignee: HITACHI, LTD.
    Inventors: Ryosuke Tatsumi, Yoshihiro Yoshii
  • Publication number: 20200151128
    Abstract: An object of the present invention is to properly secure the consistency of data while suppressing a processing load of a controller on a processor. A storage system includes a plurality of controllers and an HCA that can directly access a memory and can communicate with the controllers. The controller includes a CPU, and a memory having a buffer region into which data is temporarily stored and a cache region into which data is cached. In the case where new data according to a write request is stored into the buffer region, the CPU of the controller sequentially transfers the new data to the cache regions using the HCA without passing through the other buffer regions.
    Type: Application
    Filed: August 21, 2019
    Publication date: May 14, 2020
    Inventors: Yuto KAMO, Ryosuke TATSUMI, Tomohiro YOSHIHARA, Takashi NAGAO
  • Publication number: 20200104055
    Abstract: To combine and apply a data volume reduction technique and an automatic tier management function, the invention provides a storage system that includes a processor and a storage medium and manages and stores data in tiers. The storage system includes a first storage tier that includes a storage area for storing data, and a second storage tier that includes a storage area for storing the data which is stored in the storage area of the first storage tier and whose storage area is changed. The processor calculates an I/O volume of the data in the first storage tier, determines the tier where data is stored based on the I/O volume, and physically stores data which is stored in the second storage tier in a storage medium corresponding to the determined tier.
    Type: Application
    Filed: September 4, 2019
    Publication date: April 2, 2020
    Applicant: Hitachi, Ltd.
    Inventors: Kazuki Matsugami, Tomohiro Yoshihara, Ryosuke Tatsumi
  • Patent number: 10589669
    Abstract: A following vehicle detection and alarm device comprises a tail camera for shooting an area behind a vehicle of interest at a predetermined frame rate, a frame quantity count unit for counting the number of frames after a following vehicle is shot in a shooting range of the tail camera until the following vehicle reaches a first position behind the vehicle of interest, an alarm instruction output unit for outputting an alarm instruction of notifying the driver of the vehicle of interest that the other vehicle is approaching at a timing set based on the number of frames counted by the frame quantity count unit, and an alarm processing unit for performing a predetermined alarm operation on the driver when the alarm instruction is output by the alarm instruction output unit.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: March 17, 2020
    Assignee: Alpine Electronics, Inc.
    Inventors: Ryosuke Tatsumi, Kousuke Mitani, Tetsu Kanamori
  • Patent number: 10460703
    Abstract: A display control apparatus configured to be connected to an imaging apparatus is provided. The display control apparatus includes an obtaining unit configured to obtain image data captured by the imaging apparatus by capturing an image behind a vehicle; an edge image generation unit configured to generate edge image data that clearly indicates a peripheral portion of the image data to be viewed via an electric mirror that is placed at a rear-view mirror position inside the vehicle; a display image generation unit configured to generate display image data by superimposing the generated edge image data onto the obtained image data; and a control unit configured to control the generated display image data to be viewed via the electric mirror.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: October 29, 2019
    Assignee: ALPINE ELECTRONICS, INC.
    Inventors: Yoshihiro Katsuyama, Ryosuke Tatsumi
  • Publication number: 20190278484
    Abstract: A computer system connected to an external computer issuing a data input/output request and a storage device, includes a logical storage area of a first layer of the storage device and a logical storage area of a second layer of the external computer. The logical storage area of the first layer includes a common area and an individual area. A storage area of the common area is associated with one or more of the second layer's logical storage areas. A storage area of the individual area is associated with one storage area of the second layer's logical storage area. The computer system performs duplication determination on a plurality of data sets and associates a plurality of data sets determined as being duplicated with the common area to associate the storage area of the common area with a plurality of storage areas of the logical storage area of the second layer.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 12, 2019
    Applicant: HITACHI, LTD.
    Inventors: Ryosuke TATSUMI, Yoshihiro YOSHII
  • Patent number: 10392679
    Abstract: The present invention is intended for effectively removing copper, iron, sulfur, which are impurities, from activated carbon on which gold is adsorbed before gold eluting in the point of view of gold recovery, and is related to a method for eluting gold from an activated carbon on which at least sulfur (S) and gold (Au) are adsorbed, whereas the activated carbon is washed with an alkali solution before eluting the gold, and then the gold is eluted from the activated carbon.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 27, 2019
    Assignee: JX NIPPON MINING & METALS CORPORATION
    Inventors: Kazuhiro Hatano, Akira Yoshimura, Ryosuke Tatsumi