Patents by Inventor Ryosuke Tomioka

Ryosuke Tomioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11603575
    Abstract: A grain-oriented electrical steel sheet includes: a silicon steel sheet including Si and Mn; a glass film arranged on a surface of the silicon steel sheet; and an insulation coating arranged on a surface of the glass film, wherein the glass film includes a Mn-containing oxide.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: March 14, 2023
    Assignee: NIPPON STEEL CORPORATION
    Inventors: Takashi Kataoka, Nobusato Morishige, Haruhiko Atsumi, Kazutoshi Takeda, Shin Furutaku, Hirotoshi Tada, Ryosuke Tomioka
  • Publication number: 20200399732
    Abstract: A grain-oriented electrical steel sheet includes: a silicon steel sheet including Si and Mn; a glass film arranged on a surface of the silicon steel sheet; and an insulation coating arranged on a surface of the glass film, wherein the glass film includes a Mn-containing oxide.
    Type: Application
    Filed: March 19, 2019
    Publication date: December 24, 2020
    Applicant: NIPPON STEEL CORPORATION
    Inventors: Takashi KATAOKA, Nobusato MORISHIGE, Haruhiko ATSUMI, Kazutoshi TAKEDA, Shin FURUTAKU, Hirotoshi TADA, Ryosuke TOMIOKA
  • Patent number: 9620178
    Abstract: According to one embodiment, there is provided a memory system including a 1st memory group, a 2nd memory group, a power supply voltage adjustment circuit, a 1st line, a 1st switch, a 2nd line, a 3rd line, and a 4th line. The power supply voltage adjustment circuit includes a 1st terminal and a 2nd terminal. The 1st line electrically connects the 1st terminal to the 1st memory group. The 1st switch includes a 3rd terminal, a 4th terminal, and a 5th terminal. The 1st switch electrically connects the 3rd terminal to the 4th terminal when turned on. The 2nd line electrically connects the 1st terminal to the 3rd terminal. The 3rd line electrically connects the 4th terminal to the 2nd memory group. The 4th line electrically connects the 2nd terminal to the 5th terminal.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: April 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Masakawa, Fuminori Kimura, Ryosuke Tomioka