Patents by Inventor Ryosuke Usui

Ryosuke Usui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240077233
    Abstract: Magnetic cold storage material particles with a low breakage rate in the case of being subjected to long-term vibration caused by operation of a refrigerator under a cryogenic temperature are provided. A cold storage device and a refrigerator, each of which includes the above-described magnetic cold storage material particles and does not degrade refrigeration performance under long-term operation, are provided. Apparatuses provided with this refrigerator, such as a superconducting magnet, are provided. Each magnetic cold storage material particle of the embodiment is composed of an intermetallic compound containing a rare earth element, and an area percentage of voids present in its cross-section is 0.0001% or more and 15% or less. Each of the cold storage device of the embodiment, the refrigerator of the embodiment, and the apparatuses provided with this refrigerator, such as a superconducting magnet, includes the magnetic cold storage material particles of the embodiment.
    Type: Application
    Filed: October 19, 2023
    Publication date: March 7, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.
    Inventors: Takahiro KAWAMOTO, Daichi USUI, Ryosuke HIRAMATSU
  • Publication number: 20230274864
    Abstract: A multilayer varistor according to the present disclosure includes: a sintered compact having, on a surface thereof, at least one planar portion and at least one corner portion; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the at least one planar portion and the at least one corner portion of the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes: a first high-resistivity layer covering the at least one planar portion; and a second high-resistivity layer covering the at least one corner portion. The first high-resistivity layer has a larger average thickness than the second high-resistivity layer.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 31, 2023
    Inventors: Yuto AKIYAMA, Ken YANAI, Masashi TAKAMURA, Yuji YAMAGISHI, Ryosuke USUI
  • Publication number: 20230274863
    Abstract: A multilayer varistor according to the present disclosure includes; a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes a thinner region having a smaller thickness than a surrounding region that surrounds the thinner region.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 31, 2023
    Inventors: Yuto AKIYAMA, Ken YANAI, Ryosuke USUI, Yuji YAMAGISHI, Masashi TAKAMURA
  • Publication number: 20230207159
    Abstract: A multilayer varistor includes: a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially and containing element Si; and an external electrode arranged to cover the high-resistivity layer partially, electrically connected to the internal electrode, and containing silver as a main component thereof. A ratio of a total mass of the alkali metals and the alkaline earth metals to a mass of the element Si in a surface region of the high-resistivity layer is equal to or less than 0.6.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 29, 2023
    Inventors: Yuto AKIYAMA, Ken YANAI, Ryosuke USUI, Yuji YAMAGISHI
  • Publication number: 20230197321
    Abstract: A multilayer varistor of the present disclosure includes a sintered body, a first internal electrode, a second internal electrode, a first external electrode, a second external electrode, and a high-resistance layer. The first internal electrode and the second internal electrode are disposed in the sintered body. The first external electrode is disposed on a surface of the sintered body and is electrically connected to the first internal electrode. The second external electrode is disposed on the surface of the sintered body and is electrically connected to the second internal electrode. The high-resistance layer covers at least part of the surface of the sintered body, and the high-resistance layer has a surface having a plurality of cracks.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 22, 2023
    Inventors: Yuto AKIYAMA, Ryosuke USUI, Ken YANAI
  • Publication number: 20220310291
    Abstract: A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: Ken YANAI, Tomokazu YAMAGUCHI, Yuji YAMAGISHI, Naoki MUTOU, Sayaka MATSUMOTO, Ryosuke USUI
  • Patent number: 11443883
    Abstract: A reactor device includes a coil, a magnetic core having the coil thereon, a case accommodating the coil and the magnetic core, a cooling plate fixed to the case, an insulating sheet disposed between the coil and the cooling plate, a compressible graphite sheet disposed between the coil and the cooling plate, and a screw to fix the cooling plate to the case. The case has a screw hole and an opening provided therein. The screw passes through the screw hole to fix the cooling plate to the case. The coil contacts the insulating sheet through the opening of the case. The graphite sheet contacts the cooling plate. The reactor has high cooling performance and reliability.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 13, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi Fujii, Ryosuke Usui, Chihiro Satou
  • Patent number: 11384892
    Abstract: A heat insulation sheet includes a fiber sheet having spaces therein and a silica xerogel held in the spaces of the fiber sheet. The heat insulation sheet includes a thick region and a low compressible region thinner than the thick region. A compressibility of the low compressible region is equal to smaller than 5% upon having a pressure of 0.7 MPa applied to the low compressible region. This heat insulation sheet is superior in electrical insulation properties and thermal insulation properties, and secures a predetermined distance even in a case that the heat insulation sheet receives pressures from the both sides thereof, thus providing equipment with reliability.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: July 12, 2022
    Assignee: PANASONIC INIELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuuichi Abe, Chihiro Satou, Ryosuke Usui
  • Patent number: 11387023
    Abstract: A sintered body that includes ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: July 12, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Ken Yanai, Tomokazu Yamaguchi, Yuji Yamagishi, Naoki Mutou, Sayaka Matsumoto, Ryosuke Usui
  • Publication number: 20220090313
    Abstract: A fiber sheet having first and second surfaces and spaces therein is prepared. The spaces of the fiber sheet are impregnated with silica sol containing water glass and ethylene carbonate. Silica gel is formed by causing the silica sol with which the spaces of the fiber sheet is impregnated to gel while a difference between respective temperatures at the first and surfaces of the fiber sheet is equal to or larger than 50° C. The silica gel is hydrophobized, thereby providing a thermal insulation sheet. In the thermal insulation sheet, compressibilities of the first and second surfaces for a predetermined pressure applied thereto are different from each other. The thermal insulation sheet may be disposed between two battery cells so as to prevent one sell from influencing the other even if the one expands.
    Type: Application
    Filed: October 10, 2019
    Publication date: March 24, 2022
    Inventors: YASUTAKA HANASHIRO, RYOSUKE USUI, CHIHIRO SATOU, YUJI YAMAGISHI
  • Publication number: 20210151237
    Abstract: A reactor device includes a coil, a magnetic core having the coil thereon, a case accommodating the coil and the magnetic core, a cooling plate fixed to the case, an insulating sheet disposed between the coil and the cooling plate, a compressible graphite sheet disposed between the coil and the cooling plate, and a screw to fix the cooling plate to the case. The case has a screw hole and an opening provided therein. The screw passes through the screw hole to fix the cooling plate to the case. The coil contacts the insulating sheet through the opening of the case. The graphite sheet contacts the cooling plate. The reactor has high cooling performance and reliability.
    Type: Application
    Filed: December 17, 2018
    Publication date: May 20, 2021
    Inventors: TAKESHI FUJII, RYOSUKE USUI, CHIHIRO SATOU
  • Publication number: 20210062955
    Abstract: Provided is a thermal insulator which can be prevented from having gaps. The thermal insulator includes a nonwoven fabric, and xerogel in interior spaces of the nonwoven fabric. The thermal insulator has a plurality of protrusions on a surface of the thermal insulator, a height of the protrusion ranges from 0.10t to 0.25t inclusive and a size of the protrusion at the surface of the thermal insulator ranges from t to 5t inclusive, where t is a thickness of the thermal insulator, and pores are provided inside the thermal insulator in a region provided with the protrusions.
    Type: Application
    Filed: March 11, 2019
    Publication date: March 4, 2021
    Inventors: YUJI YAMAGISHI, RYOSUKE USUI, YUUICHI ABE, SHUN AOTA, RIKAKO IWASAKI
  • Publication number: 20210050280
    Abstract: A highly reliable electronic device that efficiently dissipates generated heat and a method for manufacturing the electronic device are provided. The electronic device includes mount board, heat generating component mounted on mount board, pressing component provided above heat generating component, and film provided between heat generating component and pressing component. Further, liquid heat conductive material is provided between heat generating component and film and between pressing component and graphite-based carbonaceous film. Film contains graphite-based carbon and is compressed to predetermined compressibility by pressing component.
    Type: Application
    Filed: May 13, 2019
    Publication date: February 18, 2021
    Inventors: AKIHITO KONISHI, RYOSUKE USUI, NORIHIRO KAWAMURA
  • Publication number: 20210018135
    Abstract: An object of the present invention is to provide a thermal insulator which is easily position-adjusted when disposed in equipment. A plurality of projections are provided on at least one surface of thermal insulator including nonwoven fabric and xerogel in interior spaces of nonwoven fabric. With this configuration, fine positioning or the like is easily performed when thermal insulator is disposed, and a thickness increases by a height of projections, so that a thermal insulation effect can be improved. Thus, the thermal insulator can be used for thermal insulation of various types of equipment.
    Type: Application
    Filed: March 11, 2019
    Publication date: January 21, 2021
    Inventors: CHIHIRO SATOU, RYOSUKE USUI
  • Publication number: 20200370701
    Abstract: A heat insulation sheet includes a fiber sheet having spaces therein and a silica xerogel held in the spaces of the fiber sheet. The heat insulation sheet includes a thick region and a low compressible region thinner than the thick region. A compressibility of the low compressible region is equal to smaller than 5% upon having a pressure of 0.7 MPa applied to the low compressible region. This heat insulation sheet is superior in electrical insulation properties and thermal insulation properties, and secures a predetermined distance even in a case that the heat insulation sheet receives pressures from the both sides thereof, thus providing equipment with reliability.
    Type: Application
    Filed: December 20, 2018
    Publication date: November 26, 2020
    Inventors: YUUICHI ABE, CHIHIRO SATOU, RYOSUKE USUI
  • Publication number: 20200340612
    Abstract: The present disclosure is intended to provide a thermal insulation sheet that is resistant to being damaged even if enlarged in shape, as well as a multilayer thermal insulation sheet including such a thermal insulation sheet. The thermal insulation sheet includes a thermal insulator made of a nonwoven fabric that supports a xerogel in internal spaces. The thermal insulator has a plurality of through holes in an internal region in a plan view. Protective sheets are disposed on two respective surfaces of the thermal insulator. The protective sheets are joined together at a periphery of the thermal insulator and through inside the through holes.
    Type: Application
    Filed: May 30, 2018
    Publication date: October 29, 2020
    Inventors: NORIHIRO KAWAMURA, CHIHIRO SATOU, RYOSUKE USUI
  • Publication number: 20200194151
    Abstract: A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.
    Type: Application
    Filed: September 19, 2018
    Publication date: June 18, 2020
    Inventors: KEN YANAI, TOMOKAZU YAMAGUCHI, YUJI YAMAGISHI, NAOKI MUTOU, SAYAKA MATSUMOTO, RYOSUKE USUI
  • Patent number: 10453776
    Abstract: A semiconductor device includes a semiconductor module including a semiconductor element, a passive element, a cooling member, a first conductive member and a second conductive member. The cooling member is disposed between the semiconductor module and the passive element. And a first conductive member and a second conductive member electrically connect the semiconductor module and the passive element. Furthermore, two or more aspects of at least one of the first conductive member and the second conductive member face the cooling member.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: October 22, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Ryosuke Usui, Tetsuzo Ueda
  • Patent number: 10297516
    Abstract: A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor element is mounted, and a groove provided around the semiconductor element on the mounting surface. An outer packaging resin covers the semiconductor element and the base, and is fixed to the base by filling the groove. A bottom of the groove includes a first recess-projection having a first amplitude and a first repetition interval along an extending direction of the groove. The first recess-projection includes a second recess-projection having a second amplitude smaller than the first amplitude and a second repetition interval shorter than the first repetition interval along the extending direction of the groove.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: May 21, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masayuki Nagamatsu, Shinya Marumo, Junichi Kimura, Tatsuya Kunisato, Ryosuke Usui
  • Patent number: 10211144
    Abstract: This semiconductor device includes a semiconductor element mounted on a metal layer, first to third connection terminals that are provided on the semiconductor element, a first bus bar bonded to the first connection terminal, and a second bus bar bonded to the second connection terminal. The semiconductor element is bonded to the metal layer, and the first to third connection terminals are disposed on a top surface of the semiconductor element. One end of the first bus bar is bonded to the first connection terminal, another end of the first bus bar is an output unit, one end of the second bus bar is bonded to the second connection terminal, and another end of the second bus bar is bonded to the metal layer. A first surface of the semiconductor element and the second bus bar are at an identical potential.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: February 19, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shinichi Kohda, Junichi Kimura, Ryosuke Usui, Tomohide Ogura, Atsushi Watanabe