Abstract: Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.

Abstract: An exposure method includes an exposure process for exposing a substrate through a halftone mask with quadrupole illumination to form plural columnar portions that are disposed into a matrix shape in a first direction and a second direction orthogonal to the first direction. The halftone mask includes a first pattern that is extended in the first direction and disposed at predetermined pitches in the second direction; and a second pattern that is extended in the second direction and disposed at predetermined pitches in the first direction such that an intersection portion intersecting the first pattern is formed. The pitches and widths of the patterns on the halftone mask are configured such that zero-order diffracted light intensity and first-order diffracted light intensity, diffracted by the halftone mask, are substantially matched with each other and such that a first-order diffracted light phase is inverted with respect to a zero-order diffracted light phase.

Abstract: A method of fabricating a semiconductor device according to an embodiment includes forming a first pattern having linear parts of a constant line width and a second pattern on a foundation layer, the second pattern including parts close to the linear parts of the first pattern and parts away from the linear parts of the first pattern and constituting closed loop shapes independently of the first pattern or in a state of being connected to the first pattern and carrying out a closed loop cut at the parts of the second pattern away from the linear parts of the first pattern.