Patents by Inventor Ryota Hirose

Ryota Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230385485
    Abstract: A simulation method in which a fluid flowing in contact with a wall surface is represented by a plurality of particles, particle-wall surface interaction and interparticle interaction are determined, and an equation of motion governing motion of the plurality of particles is solved for each of the plurality of particles to develop positions and velocities of the plurality of particles over time includes causing, in a case where the equation of motion is solved, attenuation force received from the wall surface and random force according to a temperature of the wall surface, in addition to force due to the interparticle interaction and the particle-wall surface interaction, to act on a particle, among the plurality of particles, whose distance to the wall surface is equal to or less than a first distance set in a simulation condition to develop a position and a velocity of a particle over time.
    Type: Application
    Filed: April 4, 2023
    Publication date: November 30, 2023
    Inventors: Ryota HIROSE, Nariaki MATSUMIYA
  • Patent number: 11361482
    Abstract: A triangle element division method includes acquiring position information of a plurality of feature points positioned on a border of a two-dimensional planar figure, segmenting a virtual plane including the two-dimensional planar figure into a plurality of quadrangular cells, disposing additional points at positions where edges as line segments connecting two adjacent feature points on the border of the two-dimensional planar figure and borders of the plurality of cells cross, and vertices of the plurality of cells, for each of the plurality of cells, generating a plurality of triangle elements with the feature points and the additional points in the cell as vertices such that conditions that a region in the cell is filled with a plurality of the triangle elements and the triangle elements do not overlap each other are satisfied, and removing the triangle elements positioned outside the two-dimensional planar figure.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: June 14, 2022
    Assignee: SUMITOMO HEAVY INDUSTRIES, LTD.
    Inventors: Yoshitaka Onishi, Ryota Hirose, Nariaki Matsumiya
  • Publication number: 20210125385
    Abstract: A triangle element division method includes acquiring position information of a plurality of feature points positioned on a border of a two-dimensional planar figure, segmenting a virtual plane including the two-dimensional planar figure into a plurality of quadrangular cells, disposing additional points at positions where edges as line segments connecting two adjacent feature points on the border of the two-dimensional planar figure and borders of the plurality of cells cross, and vertices of the plurality of cells, for each of the plurality of cells, generating a plurality of triangle elements with the feature points and the additional points in the cell as vertices such that conditions that a region in the cell is filled with a plurality of the triangle elements and the triangle elements do not overlap each other are satisfied, and removing the triangle elements positioned outside the two-dimensional planar figure.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 29, 2021
    Inventors: Yoshitaka Onishi, Ryota Hirose, Nariaki Matsumiya
  • Publication number: 20200395101
    Abstract: In disposing plural polymer molecule models each including plural monomer particles in an initial disposition area in a virtual space as a simulation target, one monomer particle is disposed in the initial disposition area. A candidate of a position of a monomer particle to be disposed next is determined as a candidate position. When a distance from a midpoint of a line connecting a position of a monomer particle disposed immediately before to a position of a monomer particle to be disposed next to a midpoint of a line connecting positions of two consecutive monomer particles included in a polymer molecule model already disposed does not satisfy an allowable condition, the candidate position determined immediately before is canceled, and another position is determined as a new candidate position. When the distance between the midpoints satisfies the allowable condition, the monomer particle is disposed at the candidate position determined immediately before.
    Type: Application
    Filed: February 6, 2020
    Publication date: December 17, 2020
    Inventor: Ryota Hirose
  • Patent number: 7719986
    Abstract: A register stores the earliest time (IRL) at which a packet can be subsequently transmitted from a transmitting device in order to obey an allowable bandwidth given to the transmitting device, the earliest time (RL-1 to n) at which the packet of each class can be transmitted in order to obey the allowable bandwidth of the class, and a final time (RG-1 to n) at which the packet of each class is to be subsequently transmitted in order to maintain the guarantee bandwidth of the class. When a packet transmittable timing is reached, the packet of a class m which the final time (RG-1 to n) approaches is transmitted preferentially from the classes in which a current time reaches the earliest time (RL-1 to n). When the transmission of a packet is started, the next earliest time (IRL), earliest time (RL-m) of the class m and final time (RG-m) is determined based on the data volume of the packet.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: May 18, 2010
    Assignee: Yamaha Corporation
    Inventors: Ryota Hirose, Mitsuhiro Onoda
  • Publication number: 20080253397
    Abstract: A register stores the earliest time (IRL) at which a packet can be subsequently transmitted from a transmitting device in order to obey an allowable bandwidth given to the transmitting device, the earliest time (RL?1 to n) at which the packet of each class can be transmitted in order to obey the allowable bandwidth of the class, and a final time (RG?1 to n) at which the packet of each class is to be subsequently transmitted in order to maintain the guarantee bandwidth of the class. When a packet transmittable timing is reached, the packet of a class m which the final time (RG?1 to n) approaches is transmitted preferentially from the classes in which a current time reaches the earliest time (RL?1 to n) . When the transmission of a packet is started, the next earliest time (IRL), earliest time (RL?m) of the class m and final time (RG?m) is determined based on the data volume of the packet.
    Type: Application
    Filed: April 23, 2008
    Publication date: October 16, 2008
    Applicant: Yamaha Corporation
    Inventors: Ryota Hirose, Mitsuhiro Onoda
  • Publication number: 20070076618
    Abstract: A pair of IP communication devices (called a source device and a destination device) perform communication using IP packets (e.g., MAC frames or jumbo frames) over a communication path lying therebetween. The IP communication device checks whether or not the size of an MAC frame exceeds the maximum frame size that is determined in advance; then, an ICMP error is sent back to the source device having an IP address, which is included in a prescribed part of the MAC frame. The source device also executes path MTU discovery so as to determine an appropriate MTU, thus improving the communication efficiency without causing a black hole in communication.
    Type: Application
    Filed: September 14, 2006
    Publication date: April 5, 2007
    Applicant: Yamaha Corporation
    Inventor: Ryota Hirose
  • Publication number: 20060056434
    Abstract: A register stores the earliest time (IRL) at which a packet can be subsequently transmitted from a transmitting device in order to obey an allowable bandwidth given to the transmitting device, the earliest time (RL-1 to n) at which the packet of each class can be transmitted in order to obey the allowable bandwidth of the class, and a final time (RG-1 to n) at which the packet of each class is to be subsequently transmitted in order to maintain the guarantee bandwidth of the class. When a packet transmittable timing is reached, the packet of a class m which the final time (RG-1 to n) approaches is transmitted preferentially from the classes in which a current time reaches the earliest time (RL-1 to n). When the transmission of a packet is started, the next earliest time (IRL), earliest time (RL-m) of the class m and final time (RG-m) is determined based on the data volume of the packet.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 16, 2006
    Applicant: Yamaha Corporation
    Inventor: Ryota Hirose
  • Patent number: 6608830
    Abstract: A router controls transmission of packets over a plurality of networks. The router has a function of carrying out address translation of addresses added to the packets between private addresses and global addresses. A plurality of interfaces are each connected to a corresponding one of the plurality of networks. A first storage device stores data for the address translation, the data being set by a user. A second storage device stores information for applying the data stored in the first storage device to each of the plurality of interfaces, the information being set by the user. A control device prepares translation management information for each of the plurality of interfaces, based on the data stored in the first storage device and the information stored in the second storage device. A translation device is arranged in each of the plurality of interfaces, for carrying out the address translation of one of the addresses added to each packet of the packets, based on the translation management information.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: August 19, 2003
    Assignee: Yamaha Corporation
    Inventors: Hisashi Hirano, Ryota Hirose, Tsuneyuki Koikeda
  • Publication number: 20010049825
    Abstract: A network device is connectable to a network for use in directing data. The receiving process is executed by receiving data having a physical address indicating a destination of the data, comparing the physical address of the received data with registered physical addresses, completing the receiving process when the physical address of the received data matches with one of the registered physical addresses, and otherwise canceling the receiving process. The transmitting process is executed by detecting a destination of data to be transmitted, selecting one of the registered physical addresses according to the detected destination of the data to be transmitted, and attaching the selected physical address to the data, thereby indicating an origin of the data.
    Type: Application
    Filed: May 1, 2001
    Publication date: December 6, 2001
    Inventors: Ryota Hirose, Masayuki Chiba, Masashi Hirano
  • Patent number: 5805684
    Abstract: A communication terminal device, interconnecting with a network system like the ISDN system, is configured by a CPU and a memory which stores calling identification numbers and called identification numbers with respect to communication companions who are registered in advance. Herein, one calling identification number and at least one called identification number are registered with respect to each communication companion. At a communication-sending event, a user designates a desired communication companion so that its calling identification number is automatically read out from the memory; and consequently, the communication terminal device automatically calls up the desired communication companion through the network system. At a communication-receiving event, the communication terminal device is informed of a calling party number corresponding to a calling party who accesses thereto through the network system.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: September 8, 1998
    Assignee: Yamaha Corporation
    Inventors: Ryota Hirose, Kazurou Tanaka, Tsuneyuki Koikeda