Patents by Inventor Ryota OHNUKI

Ryota OHNUKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230282452
    Abstract: According to one embodiment, a method of cleaning a plasma treatment device that treats a substrate, including conveying a cover ring into a treatment container including an upper electrode in the plasma treatment device. The cover ring is mounted on a substrate mounting table to cover an outer circumferential ring, the substrate mounting table including a lower electrode which faces the upper electrode in the treatment container. In the lower electrode the outer circumferential ring is disposed on a circumferential portion of the substrate mounting table. A cleaning gas is supplied into the treatment container, supplying power to at least one of the upper electrode or the lower electrode. Plasma is generated in the treatment container to clean an inside of the treatment container. The cover ring is conveyed from the treatment container after completion of the cleaning.
    Type: Application
    Filed: August 26, 2022
    Publication date: September 7, 2023
    Applicant: KIOXIA CORPORATION
    Inventor: Ryota OHNUKI
  • Patent number: 11049871
    Abstract: A semiconductor storage device of an embodiment includes a plurality of pillars extending in a predetermined direction, a plurality of first memory cells arrayed on a side surface on one side of each of the pillars along an extending direction of the pillars, a plurality of second memory cells arrayed on a side surface of on another side each of the pillars along the extending direction of the pillars, a plurality of first and second word lines arrayed in the extending direction of the pillars, and respectively connected to the first and second memory cells, and in a cell array in which the plurality of pillars is disposed, the plurality of pillars are periodically arrayed without interruption in a lead-out direction of the first word lines and the second word lines.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: June 29, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Ryota Ohnuki
  • Publication number: 20200235118
    Abstract: A semiconductor storage device of an embodiment includes a plurality of pillars extending in a predetermined direction, a plurality of first memory cells arrayed on a side surface on one side of each of the pillars along an extending direction of the pillars, a plurality of second memory cells arrayed on a side surface of on another side each of the pillars along the extending direction of the pillars, a plurality of first and second word lines arrayed in the extending direction of the pillars, and respectively connected to the first and second memory cells, and in a cell array in which the plurality of pillars is disposed, the plurality of pillars are periodically arrayed without interruption in a lead-out direction of the first word lines and the second word lines.
    Type: Application
    Filed: September 3, 2019
    Publication date: July 23, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Ryota OHNUKI
  • Publication number: 20150243511
    Abstract: According to one embodiment, there is provided a transferring method in which, from a mask pattern including a first region of a first pattern that is surrounded by a first space and a second region of a second pattern that is surrounded by a space wider than the first space, only the first pattern is selectively transferred on a mask layer. After transferring only the first pattern on the mask layer using the mask pattern and leaving a mask layer in the second region, a pattern on the mask layer is transferred on a film to be processed.
    Type: Application
    Filed: May 13, 2014
    Publication date: August 27, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryota OHNUKI
  • Publication number: 20150014762
    Abstract: A semiconductor storage device is disclosed. The semiconductor device includes a semiconductor substrate; and a gate electrode disposed above the semiconductor substrate. The gate electrode includes a conductive film, a metal film, and a first insulating film. In a cross sectional view of the gate electrode, at least the metal film includes a receding portion receding in a lateral direction as compared to the first insulating film, and wherein a second insulating film is disposed in the receding portion and contacts sidewalls of the metal film.
    Type: Application
    Filed: February 11, 2014
    Publication date: January 15, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Ryota OHNUKI
  • Publication number: 20140217555
    Abstract: A semiconductor device according to the present embodiment includes a semiconductor substrate. A plurality of line patterns are formed into stripes present above the semiconductor substrate. Each of the line patterns includes a narrow portion having a constricted width in a perpendicular direction to an extension direction of the line pattern.
    Type: Application
    Filed: May 30, 2013
    Publication date: August 7, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryota OHNUKI