Abstract: A laminate including a first base material layer, a second base material layer, and a sealant layer in this order, wherein all three layers include a polyolefin film; the polyolefin film of the first base material layer or the second base material layer includes an inorganic oxide layer on at least one surface thereof; and each of the first base material layer, the second base material layer, and the sealant layer has a heat shrinkage rate, in a travel direction after heating at 120° C. for 15 minutes, which satisfies the following inequalities: heat shrinkage rate of the second base material layer?5% (Inequality 1); heat shrinkage rate of the second base material layer?heat shrinkage rate of the first base material layer (Inequality 2); and, heat shrinkage rate of the second base material layer?heat shrinkage rate of the sealant layer (Inequality 3).

Abstract: A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.

Abstract: A semiconductor device includes: a substrate; a drift region disposed on a principal surface of the substrate; a first well region extending from a second principal surface of the drift region in a direction perpendicular to the second principal surface and having a bottom portion; a second well region being in contact with the bottom portion and disposed at a portion inside the substrate located below the bottom portion; and a source region extending in a perpendicular direction from a region of the second principal surface provided with the first well region, and reaching the second well region. In a direction parallel to the second principal surface and oriented from a source electrode to a drain electrode, a distance of the second well region in contact with a gate insulating film is shorter than a distance of the first well region in contact with the gate insulating film.

Abstract: A semiconductor device includes: a substrate having a groove formed on a main surface; a drift region of a first conductivity type, the drift region having a portion disposed at a bottom part; a well region of a second conductivity type, the well region being disposed in one sidewall to be connected to the drift region; a first semiconductor region of the first conductivity type, the first semiconductor region being disposed on a surface of the well region in the sidewall to be away from the drift region; a second semiconductor region of the first conductivity type, the second semiconductor region being disposed to be opposed to the well region via the drift region; and a gate electrode opposed to the well region, the gate electrode being disposed in a gate trench that has an opening extending over the upper surfaces of the well region and the first semiconductor region.

Abstract: A semiconductor device includes: a substrate; a semiconductor layer disposed on a main surface of the substrate; and a first main electrode and a second main electrode, which are disposed on the substrate separately from each other with the semiconductor layer sandwiched therebetween and are individually end portions of a current path of a main current flowing in an on-state. The semiconductor layer includes: a first conductivity-type drift region through which a main current flows; a second conductivity-type column region that is disposed inside the drift region and extends in parallel to a current path; and an electric field relaxation region that is disposed in at least a part between the drift region and the column region and is either a low-concentration region in which an impurity concentration is lower than in the same conductivity-type adjacent region or a non-doped region.

Abstract: A semiconductor device includes: a conductive semiconductor substrate in which a trench is formed on the first main surface; a plurality of conductive layers, each of which is either a first conductive layer or a second conductive layer, which are laminated on one another along a surface normal direction of a side surface of the trench; and dielectric layers arranged between a conductive layer closest to the side surface of the trench among the plurality of conductive layers and the side surface of the trench, and between the plurality of corresponding conductive layers. The first conductive layer is electrically insulated from the semiconductor substrate, and the semiconductor substrate that electrically connects to the second conductive layer inside the trench electrically connects to the second electrode.

Abstract: A CPUs operate by predetermined power that is generated based on power supplied from a power source unit. A multiplexer (MUX) is supplied with power from the power source unit, and suspends connection between the CPUs and a second arithmetic-processing unit when the CPUs are connected to the second arithmetic-processing unit included in another system board, and connects the CPUs and the second arithmetic-processing unit after predetermined time passes.

Abstract: A semiconductor device includes: a drift region of a first conductive type including a contact section and extension sections extending along the main surface of a substrate; column regions of a second conductive type which alternate with the extension sections in a perpendicular direction to the extension direction of the extension sections and each includes an end connecting to the contact section; a well region of a second conductive type which connects to the other end of each column region and tips of the extension sections; and electric field relaxing electrodes which are provided above at least some of residual pn junctions with an insulating film interposed therebetween. Herein, the residual pn junctions are pn junctions other than voltage holding pn junctions formed in interfaces between the extension sections and the column regions.

Abstract: A semiconductor device includes: a substrate; a drift region disposed on a principal surface of the substrate; a first well region extending from a second principal surface of the drift region in a direction perpendicular to the second principal surface and having a bottom portion; a second well region being in contact with the bottom portion and disposed at a portion inside the substrate located below the bottom portion; and a source region extending in a perpendicular direction from a region of the second principal surface provided with the first well region, and reaching the second well region. In a direction parallel to the second principal surface and oriented from a source electrode to a drain electrode, a distance of the second well region in contact with a gate insulating film is shorter than a distance of the first well region in contact with the gate insulating film.

Abstract: A semiconductor device includes: a gate electrode groove formed in contact with a drift region, a well region, and a source region; a gate electrode formed on a surface of the gate electrode groove via an insulating film; a source electrode groove in contact with the gate electrode groove; a source electrode electrically connected to a source region; and a gate wiring electrically insulated from the source electrode and formed inside the source electrode groove in contact with the gate electrode.

Abstract: Provided is a method for manufacturing an electric resistance welded metal pipe by butting side ends of a metal strip against each other and then welding the side ends by high frequency heating to manufacture an electric resistance welded metal pipe, each side end being provided with an inner surface side corner portion located on an inner surface side of the electric resistance welded metal pipe, wherein the method comprises a step of forming an inclined surface at the inner surface side corner portion before butting the side ends of the metal strip; and wherein the side ends are butted and welded to each other such that the inclined surface remains on an excess metal of the metal pipe after electric resistance welding and a discharged metal is not welded to the excess metal.

Abstract: A semiconductor device includes: a substrate; a drift region formed on a main surface of the substrate; a well region formed in a main surface of the drift region; a source region formed in the well region; a gate groove formed from the main surface of the drift region in a perpendicular direction while being in contact with the source region, the well region, and the drift region; a drain region formed in the main surface of the drift region; a gate electrode formed on a surface of the gate groove with a gate insulating film interposed therebetween; a protection region formed on a surface of the gate insulating film facing the drain region; and a connection region formed in contact with the well region and the protection region.

Abstract: A semiconductor device includes: a gate electrode groove formed in contact with a drift region, a well region, and a source region; a gate electrode formed on a surface of the gate electrode groove via an insulating film; a source electrode groove in contact with the gate electrode groove; a source electrode electrically connected to a source region; and a gate wiring electrically insulated from the source electrode and formed inside the source electrode groove in contact with the gate electrode.

Abstract: A method for manufacturing an electric resistance welded metal pipe by butting side ends of a metal strip against each other and then welding the side ends by high frequency heating to manufacture an electric resistance welded metal pipe, each side end being provided with an inner surface side corner portion located on an inner surface side of the electric resistance welded metal pipe, the method includes a step of forming an inclined surface at the inner surface side corner portion before butting the side ends of the metal strip, and wherein the side ends are butted and welded to each other such that the inclined surface remains on an excess metal of the metal pipe after electric resistance welding and a discharged metal is not welded to the excess metal.

Abstract: There are included a first conductivity-type first drift region formed on a first main surface of a substrate, and a first conductivity-type second drift region formed on the first main surface of the substrate, the second drift region formed to be reached to a deeper position of the substrate than a position of the first drift region. There are further included a second conductivity-type well region in contact with the second drift region, a first conductivity-type source region formed to extend in a direction perpendicular to a surface of the well region, and a first conductivity-type drain region separated from the well region, the drain region formed to extend in a direction perpendicular to a surface of the first drift region. Since a flow path of electrons after passing through a channel can be widened, a resistance can be reduced.

Abstract: Provided is a method for manufacturing an electric resistance welded metal pipe by butting side ends of a metal strip against each other and then welding the side ends by high frequency heating to manufacture an electric resistance welded metal pipe, each side end being provided with an inner surface side corner portion located on an inner surface side of the electric resistance welded metal pipe, wherein the method comprises a step of forming an inclined surface at the inner surface side corner portion before butting the side ends of the metal strip; and wherein the side ends are butted and welded to each other such that the inclined surface remains on an excess metal of the metal pipe after electric resistance welding and a discharged metal is not welded to the excess metal.

Abstract: A semiconductor device includes: a substrate; a drift region formed on a main surface of the substrate; a well region formed in a main surface of the drift region; a source region formed in the well region; a gate groove formed from the main surface of the drift region in a perpendicular direction while being in contact with the source region, the well region, and the drift region; a drain region formed in the main surface of the drift region; a gate electrode formed on a surface of the gate groove with a gate insulating film interposed therebetween; a protection region formed on a surface of the gate insulating film facing the drain region; and a connection region formed in contact with the well region and the protection region.

Abstract: A CPUs operate by predetermined power that is generated based on power supplied from a power source unit. A multiplexer (MUX) is supplied with power from the power source unit, and suspends connection between the CPUs and a second arithmetic-processing unit when the CPUs are connected to the second arithmetic-processing unit included in another system board, and connects the CPUs and the second arithmetic-processing unit after predetermined time passes.

Abstract: A simulation assist apparatus includes a memory, and a processor coupled to the memory and configured to acquire a first index value included in an analysis object by a first simulation technique, acquire a second index value, acquire a third index value being obtained by processing a specific element being not permitted to be processed by the first simulation technique, and the first element by a second simulation technique, acquire a fourth index value being obtained by the second simulation technique, calculate an influence degree of the specific element based on a division value being obtained by dividing the value of the second index by the third index value, and a difference between the third index value and the fourth index value, and calculate a fifth index value being estimated to be obtained by processing the first simulation technique, based on the first index value and the influence degree.

Abstract: An information processing system includes a first control unit including a first memory configured to store first software, and a first controller configured to perform processing based on the first software and to update the first software in a case where an instruction to update the first software is received, and a second control unit configured to be coupled to the first control unit, the second control unit including a second memory configured to store second software that is the same as the first software, a second controller configured to perform processing based on the second software, and a first power supply circuit configured to start power supply to the second controller in a case where a failure in the first control unit is detected.