Patents by Inventor Ryozo Hiraga

Ryozo Hiraga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4806773
    Abstract: A wafer position detecting device includes a laser source, a mirror for receiving the laser beam and reflecting it to a photosensor. Optically between the laser source and the photosensor, there is located a wafer cassette containing plural semiconductor wafers in the manner that the optical path of the laser is parallel to the surface of the wafer in the cassette, namely that the laser beam can incident on the edge of the wafer parallel to the surface thereof. Relative movement is caused between the wafer and the laser beam in the direction perpendicular to the wafer surface. The space or the wafer can be detected on the basis of the output of the photosensor.
    Type: Grant
    Filed: September 4, 1987
    Date of Patent: February 21, 1989
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryozo Hiraga, Hiroshi Echizen
  • Patent number: 4789294
    Abstract: A wafer processing apparatus, comprising a wafer processing station for processing a wafer, a key input portion for inputting wafer processing instructions into the wafer processing station, and wherein at least one of a portion for accommodating a wafer carrier for carrying the wafer, a mechanism for taking the wafer out of the wafer carrier and putting it back into the wafer carrier, wafer alignment station for aligning the wafer and a wafer observing station for allowing an operator to observe the wafer, is disposed at a front side of the apparatus to which the operator faces when actuating the key input portion.
    Type: Grant
    Filed: August 27, 1986
    Date of Patent: December 6, 1988
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsuya Sato, Shunzo Imai, Ryozo Hiraga
  • Patent number: 4553845
    Abstract: An alignment apparatus for aligning a mask having a first mark comprising first mark elements and a wafer having a second mark comprising second mark elements different in width from the first mark elements, comprises a moving mechanism for moving the wafer, a sensor for detecting the first and second marks and putting out a detection signal stream, a signal processing circuit for receiving the detection signal stream, discriminating between the first mark elements and the second mark elements in accordance with their respective pulse widths and creating a discrimination signal and creating a spacing signal regarding a plurality of spacings between the first mark elements and the second mark elements, and a drive circuit for driving the moving mechanism in response to the discrimination signal and the spacing signal.
    Type: Grant
    Filed: October 22, 1982
    Date of Patent: November 19, 1985
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Kuroki, Yukihiro Yoshinari, Ryozo Hiraga
  • Patent number: 4545684
    Abstract: Alignment is effected between a mask having a plurality of first alignment marks, a wafer having a plurality of second alignment marks, alignment marks for another step juxtaposed with respect to the second alignment marks and a reference mark indicating the boundary between the second alignment marks and the alignment marks for another step. Alignment is effected by detecting device for detecting the first and second alignment marks and the reference mark and putting out a signal stream, and an electrical circuit for effecting the introduction of signals from the signal stream in accordance with a predetermined timing, extracting from the signal stream a signal regarding the reference mark and effecting the introduction of signals from the again detected signal stream at a timing changed in accordance with the signal regarding the reference mark.
    Type: Grant
    Filed: October 22, 1982
    Date of Patent: October 8, 1985
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Kuroki, Yukihiro Yoshinari, Ryozo Hiraga
  • Patent number: 4530604
    Abstract: This specification discloses a method of aligning a mask and a wafer for manufacturing semiconductor circuit elements into a predetermined positional relationship. The method comprises two steps. In a first step, the mask and wafer are aligned by the use of relatively large alignment marks provided on the mask and wafer. In a second step, the mask and wafer are aligned by using relatively small key patterns provided on the mask and wafer and having substantially no positional deviation with respect to actual element (circuit) patterns.
    Type: Grant
    Filed: August 8, 1983
    Date of Patent: July 23, 1985
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhisa Okutsu, Katsumi Momose, Ryozo Hiraga
  • Patent number: 4515481
    Abstract: An apparatus for processing a signal for aligning a first object having at least one standard mark thereon with a second object having at least one reference mark thereon, includes a first sensor for sensing the standard mark, second sensor for sensing the reference mark through the first object, an illumination source for illuminating the standard mark and the reference mark, a first extracting circuit for extracting a signal concerning the standard mark from the signal stream of the first sensor, a second extracting circuit for extracting a signal concerning the reference mark from the signal stream of the second sensor, and a signal composing circuit for composing the signal concerning the standard mark and the signal concerning the reference mark.
    Type: Grant
    Filed: September 17, 1982
    Date of Patent: May 7, 1985
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuyoshi Yamada, Ryozo Hiraga
  • Patent number: 4504148
    Abstract: Disclosed is a system to be used with a wafer provided with at least one first alignment mark and a mask provided with a plurality of second alignment marks and which is provided with a detecting device for sensing the first and second alignment marks and putting out detection signals, a signal producing circuit producing a comparison signal, and a signal comparing and producing circuit for comparing the pulse width of the comparison signal with the pulse width of the detection signals and producing a plurality of substitute signals when the pulse width of the detection signal is greater than the pulse width of the comparison signal and wherein when the first and second alignment marks have come close to each other or partly overlapped each other, the respective alignment marks are discriminated.
    Type: Grant
    Filed: October 22, 1982
    Date of Patent: March 12, 1985
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Kuroki, Yukihiro Yoshinari, Ryozo Hiraga
  • Patent number: 4487505
    Abstract: An apparatus for processing a signal for aligning a mask having at least one standard mark thereon with a wafer having at least one reference mark thereon, includes a first sensor for sensing the standard mark, a second sensor for sensing the reference mark through the mask, a threshold value determining circuit for detecting a peak value from a signal stream put out by the first sensor and determining a first threshold value and for detecting a peak value from a signal stream put out by the second sensor and determining a second threshold value, a signal converting circuit for converting a signal of a higher level than the first threshold value from the signal stream put out by the first sensor into a first digital signal and for converting a signal of a higher level than the second threshold value from the signal stream put out by the second sensor into a second digital signal, and a composing circuit for composing the first digital signal and the second digital signal.
    Type: Grant
    Filed: September 17, 1982
    Date of Patent: December 11, 1984
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeki Nakano, Yasuyoshi Yamada, Ryozo Hiraga
  • Patent number: 4440493
    Abstract: In an apparatus for printing a mask pattern on a wafer for manufacturing a semiconductor circuit element, the exposure of the mask pattern is effected by being divided into a plurality of times. Each time the divided exposure is effected, the relative positional relation of the mask pattern and the wafer is made to differ by a minute amount. Thereby, a mask pattern thinner than the line width of the mask pattern is formed on the wafer.
    Type: Grant
    Filed: March 2, 1983
    Date of Patent: April 3, 1984
    Assignee: Canon Kabushiki Kaisha
    Inventor: Ryozo Hiraga
  • Patent number: 4315201
    Abstract: An alignment apparatus for mask and wafer each having alignment marks provided in a narrow strip like area between circuit patterns is disclosed, which mask and wafer are used in manufacturing semiconductor circuit elements. In the apparatus, the mask and wafer are scanned to obtain scan signals by means of which the amount of relative deviation between the alignment marks on mask and wafer is detected. By means of the detected signal, an alignment is effected between the mask and wafer in the apparatus. For this type of alignment apparatus, there is a problem that since the alignment marks are provided in the narrow strip like area, no coincidence between the scanning position and the strip area is attainable with pre-alignment accuracy. Improvement in the alignment apparatus according to the invention lies in that a reading of alignment marks is initiated after the coincidence is photoelectrically detected.
    Type: Grant
    Filed: March 8, 1978
    Date of Patent: February 9, 1982
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akiyoshi Suzuki, Ryozo Hiraga, Ichiro Kano, Hideki Yoshinari, Masao Totsuka, Yuzo Kato, Yasuo Ogino
  • Patent number: 4301363
    Abstract: An alignment device of a type, wherein an alignment pattern provided on a mask for fabrication of a semiconductor circuit element and an alignment pattern provided on a wafer are photoelectrically read in a dark field by a flying spot scanning system or a flying image scanning system to detect a relative positional relationship between the mask and the wafer, and a desired positional relationship is obtained by moving at least one of the mask and wafer on the basis of a detected signal. The novel feature of this alignment device resides in that the size of a line forming the alignment pattern along the scanning line is twice or more as large as the size of the scanning spot.
    Type: Grant
    Filed: August 30, 1979
    Date of Patent: November 17, 1981
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akiyoshi Suzuki, Ryozo Hiraga, Hideki Yoshinari
  • Patent number: 4278893
    Abstract: An alignment apparatus by which two points on a first standard line on a first workpiece may be aligned in two regions having as the centers two standard points on a second standard line on a second workpiece optically opposed to the first workpiece and having predetermined areas. The two regions are diamond-shaped. By this, it is possible to reduce the alignment error of the first and second workpieces.
    Type: Grant
    Filed: February 23, 1979
    Date of Patent: July 14, 1981
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuzo Kato, Yasuo Ogino, Ryozo Hiraga, Hideki Yoshinari, Masao Tozuka, Ichiro Kano, Akiyoshi Suzuki
  • Patent number: 4275306
    Abstract: An alignment apparatus in which alignment marks on a mask and a wafer for producing a semiconductor circuit element are photoelectrically read and the positional deviation between the two alignment marks is detected and one of the mask and the wafer is parallel-moved in accordance with the detected amount to align the mask and wafer into a predetermined positional relation. This apparatus has the function of correcting any interval error which may be present between the alignment marks.
    Type: Grant
    Filed: February 23, 1979
    Date of Patent: June 23, 1981
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuzo Kato, Yasuo Ogino, Ryozo Hiraga, Hideki Yoshinari, Masao Tozuka, Ichiro Kano
  • Patent number: 4262208
    Abstract: This invention relates to a photo-electrical detecting apparatus for forming a dark-field image of an object on a one-dimensional image sensor and reading said image photo-electrically. The apparatus includes a telecentric objective lens, and a light source image is formed on the clear aperture plane of said lens, said image being in focus in a direction on said plane and out of focus in a perpendicular direction. A line- or band-shaped area of the object is illuminated by the light from said light source image. Thus a dark-field image of the object is formed on said one-dimensional image sensor by providing, on a plane equivalent to said aperture plane, a filter which intercepts the normal reflected light from said object and transmits the scattered light therefrom.
    Type: Grant
    Filed: June 19, 1979
    Date of Patent: April 14, 1981
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akiyoshi Suzki, Ichiro Kano, Hideki Yoshinari, Masao Tozuka, Ryozo Hiraga, Yuzo Kato, Yasuo Ogino
  • Patent number: 4202627
    Abstract: An improved photoelectric detecting apparatus is disclosed in which a subject surface containing a pattern which diffracts light in a predetermined direction is scanned with spotlight and the diffracted light coming from the pattern is detected by means of photoelectric element so as to read out information of the pattern. The apparatus comprises a first photoelectric element for detecting the light diffracted in the predetermined direction, a second photoelectric element adapted for detecting light diffracted in directions other than the predetermined direction and an operational circuit for operating the signal derived from the first photoelectric element and that derived from the second one. Thus, when there is any diffractive matter such as flaw, dust and the like on the subject surface, diffracted light from the diffractive matter is detected by both the first and second photoelectric elements whereas diffracted light from the pattern is detected only by the first photoelectric element.
    Type: Grant
    Filed: April 28, 1978
    Date of Patent: May 13, 1980
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akiyoshi Suzki, Ichiro Kano, Hideki Yoshinari, Masao Tozuka, Ryozo Hiraga, Yuzo Kato, Yasuo Ogino
  • Patent number: 3944921
    Abstract: An electronic circuit test equipment generates signals indicative of electrical conditions of a desired point in a circuit under test. The signals may be audible. light signals or combination thereof.
    Type: Grant
    Filed: February 13, 1974
    Date of Patent: March 16, 1976
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shin Tsuda, Ryozo Hiraga
  • Patent number: 3931789
    Abstract: An apparatus for continuously processing articles includes a pre-heating chamber for confining a vacuum therein provided with four openings by which an entrance chamber, two depositing chamber and an exit chamber communicate therewith individually. Each of the openings is provided with a gate valve mounted therein for covering the openings, and particularly the entrance and exit chambers serving to maintain the vacuum in the pre-heating chamber at a predetermined level while feeding unprocessed articles to and removing the processed articles from the pre-heating chamber in such a manner that the vacuum is not affected by the ambient atmosphere. The pre-heating chamber comprises a cylindrical housing in which a water-wheel-like conveyor having means for receiving and holding vacuum deposition jigs carrying articles such as optical elements is intermittently rotated to advance the vacuum deposition jigs through the pre-heating chamber.
    Type: Grant
    Filed: April 19, 1974
    Date of Patent: January 13, 1976
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsuo Kakei, Keijiro Nishida, Tadayoshi Kasahara, Masao Shimabayashi, Ryozo Hiraga, Tomomasa Nakano, Ichiro Komatsubara