Abstract: A data bus precharging circuit has: a charging circuit for charging a common data bus in response to a precharge control signal, the common data bus having a plurality of bit lines; a precharge sensing circuit for generating a reset signal when all of the bit lines of the data bus are charged; and a control signal generating circuit for the charging circuit to charge the data bus when a precharge clock signal is inputted to the control signal generating circuit, and for disabling the charging circuit from charging the data bus when the reset signal is inputted to the control signal generating circuit from the precharge sensing circuit.