Abstract: A circuit device includes an HS driver that is a USB HS-mode transmission circuit and a disconnection detection circuit that performs disconnection detection of USB. The disconnection detection circuit includes a holding circuit that measures and holds first voltage level information that is voltage level information of one signal out of a DP signal and a DM signal of the USB when the HS driver is transmitting a host chirp, a determination voltage generation circuit that generates a first determination voltage based on the first voltage level information, and a detection circuit that performs disconnection detection of the USB based on the first determination voltage and outputs a disconnection detection signal.

Abstract: A circuit apparatus includes physical layer circuits to which buses compliant with the USB standard are coupled, a processing circuit that performs an FS transfer process, a bus monitoring circuit that monitors the buses, and a bus switching circuit that turns on or off the coupling between a first bus and a second bus based on the result of the monitoring. One of the physical layer circuits includes an FS receiver, an FS driver, and a pull-up control circuit, and the other physical layer circuits includes an FS receiver and an FS driver. When FS_J is detected on the second bus, the bus monitoring circuit turns off the coupling achieved by the bus switching circuit, turns on the pull-up operation performed by the pull-up control circuit, and turns on the FS transfer process performed by the processing circuit.

Abstract: A circuit device includes: a first physical layer circuit to which a first bus compliant with a USB standard is connected; a second physical layer circuit to which a second bus compliant with the USB standard is connected; a processing circuit that performs transfer processing in which a packet received from the first bus via the first physical layer circuit is transferred to the second bus via the second physical layer circuit, and a packet received from the second bus via the second physical layer circuit is transferred to the first bus via the first physical layer circuit; a bus monitor circuit that performs a monitor operation with respect to the first and second buses; and a bus switch circuit that switches on or off a connection between the first bus and the second bus based on a monitor result from the bus monitor circuit.

Abstract: A circuit apparatus includes physical layer circuits to which buses compliant with the USB standard are coupled, a processing circuit that performs an FS transfer process, a bus monitoring circuit that monitors the buses, and a bus switching circuit that turns on or off the coupling between a first bus and a second bus based on the result of the monitoring. One of the physical layer circuits includes an FS receiver, an FS driver, and a pull-up control circuit, and the other physical layer circuits includes an FS receiver and an FS driver. When FS_J is detected on the second bus, the bus monitoring circuit turns off the coupling achieved by the bus switching circuit, turns on the pull-up operation performed by the pull-up control circuit, and turns on the FS transfer process performed by the processing circuit.

Abstract: A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus, which are compliant with the USB standard, ON in a first period and OFF in a second period, and a processing circuit that performs processing for transferring a packet in a transfer route constituted by the first bus, the first and second physical layer circuits, and the second bus, in the second period. The second physical layer circuit includes a disconnection detection circuit that detects device disconnection of a device connected to the second bus side. If device disconnection is detected in the second period, the connection between the first bus and the second bus is switched from off to on after a wait period has elapsed from the timing at which the device disconnection was detected.

Abstract: A circuit device includes an HS driver that is a USB HS-mode transmission circuit and a disconnection detection circuit that performs disconnection detection of USB. The disconnection detection circuit includes a holding circuit that measures and holds first voltage level information that is voltage level information of one signal out of a DP signal and a DM signal of the USB when the HS driver is transmitting a host chirp, a determination voltage generation circuit that generates a first determination voltage based on the first voltage level information, and a detection circuit that performs disconnection detection of the USB based on the first determination voltage and outputs a disconnection detection signal.

Abstract: A circuit device includes a first physical layer circuit to which a first bus with a USB standard is coupled, a second physical layer circuit to which a second bus with the USB standard is coupled, and a bus monitor circuit monitoring the first bus and the second bus, in which the first physical layer circuit includes a first disconnect detection circuit which detects device disconnect in the first bus, the bus monitor circuit includes a first test signal detection circuit which detects whether or not a test signal is output to the first bus, and when detection of the device disconnect by the first disconnect detection circuit is disabled, detection of the test signal by the first test signal detection circuit is disabled.

Abstract: A circuit device includes a first physical layer circuit to which a first bus with a USB standard is coupled, a second physical layer circuit to which a second bus with the USB standard is coupled, and a bus monitor circuit monitoring the first bus and the second bus, in which the first physical layer circuit includes a first disconnect detection circuit which detects device disconnect in the first bus, the bus monitor circuit includes a first test signal detection circuit which detects whether or not a test signal is output to the first bus, and when detection of the device disconnect by the first disconnect detection circuit is disabled, detection of the test signal by the first test signal detection circuit is disabled.

Abstract: A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus, which are compliant with the USB standard, ON in a first period and OFF in a second period, and a processing circuit that performs processing for transferring a packet in a transfer route constituted by the first bus, the first and second physical layer circuits, and the second bus, in the second period. The second physical layer circuit includes a disconnection detection circuit that detects device disconnection of a device connected to the second bus side. If device disconnection is detected in the second period, the connection between the first bus and the second bus is switched from off to on after a wait period has elapsed from the timing at which the device disconnection was detected.

Abstract: A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus, which are compliant with the USB standard, ON in a first period and OFF in a second period, and a processing circuit that performs processing for transferring a packet in a transfer route constituted by the first bus, the first and second physical layer circuits, and the second bus, in the second period. The second physical layer circuit includes a disconnection detection circuit that detects device disconnection of a device connected to the second bus side. If device disconnection is detected in the second period, the connection between the first bus and the second bus is switched from off to on after a wait period has elapsed from the timing at which the device disconnection was detected.

Abstract: A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus, which are compliant with the USB standard, ON in a first period and OFF in a second period, and a processing circuit that performs processing for transferring a packet in a transfer route constituted by the first bus, the first and second physical layer circuits, and the second bus, in the second period. The second physical layer circuit includes a disconnection detection circuit that detects device disconnection of a device connected to the second bus side. If device disconnection is detected in the second period, the connection between the first bus and the second bus is switched from off to on after a wait period has elapsed from the timing at which the device disconnection was detected.

Abstract: A data communication system has a first data communication circuit for outputting a clock signal to a clock signal line, receiving data input from a data signal line, and outputting data as open drain output to the data signal line, a second data communication circuit for receiving input of a clock signal from the clock signal line, receiving input of data from the data signal line, and outputting data as open drain output to the data signal line, a first pull-up resistor connected between the data signal line and the wiring of a power supply potential, a second pull-up resistor for selectively pulling up the data signal line, and a pull-up control circuit that is connected to the second pull-up resistor, and strengthens pull-up of the data signal line at least in response to a clock signal.

Abstract: A circuit device includes: a first physical layer circuit to which a first bus compliant with a USB standard is connected; a second physical layer circuit to which a second bus compliant with the USB standard is connected; a processing circuit that performs transfer processing in which a packet received from the first bus via the first physical layer circuit is transferred to the second bus via the second physical layer circuit, and a packet received from the second bus via the second physical layer circuit is transferred to the first bus via the first physical layer circuit; a bus monitor circuit that performs a monitor operation with respect to the first and second buses; and a bus switch circuit that switches on or off a connection between the first bus and the second bus based on a monitor result from the bus monitor circuit.

Abstract: A data communication system has a first data communication circuit for outputting a clock signal to a clock signal line, receiving data input from a data signal line, and outputting data as open drain output to the data signal line, a second data communication circuit for receiving input of a clock signal from the clock signal line, receiving input of data from the data signal line, and outputting data as open drain output to the data signal line, a first pull-up resistor connected between the data signal line and the wiring of a power supply potential, a second pull-up resistor for selectively pulling up the data signal line, and a pull-up control circuit that is connected to the second pull-up resistor, and strengthens pull-up of the data signal line at least in response to a clock signal.

Abstract: The present invention relates to a technique to absorb a speed difference between a data transmission/reception unit, included in a host device which has a interface controller, and a data transmission/reception unit with a external device. The host device and the external apparatus are both electronic apparatus, and the interface controller outputs a transfer clock to the external apparatus, and controls the data transfer between the interface controller and the external apparatus, in accordance with a specific interface specification defined based on the transfer clock.