Patents by Inventor Ryuichi Kamo
Ryuichi Kamo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7754568Abstract: A semiconductor device such as a flash memory includes a semiconductor substrate, two gate insulating films formed on the substrate so as to have a first film thickness and a second film thickness smaller than the first film thickness respectively, and a polycrystalline silicon film formed on the gate insulating films so that parts of the polycrystalline silicon film on the respective gate insulating films are on a level with each other and serving as a gate electrode. The substrate is formed with a recess defined by a bottom and sidewalls substantially perpendicular to the bottom, the recess corresponding to the part of the gate insulating film with the first film thickness.Type: GrantFiled: June 2, 2008Date of Patent: July 13, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Ryuichi Kamo, Minori Kajimoto, Hiroaki Tsunoda, Yuuichiro Murahama
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Patent number: 7495308Abstract: A semiconductor device includes a semiconductor substrate including a plurality of trenches formed along a first direction and a plurality of first upper surfaces divided by the trenches, a plurality of element isolation insulating films embedded in the respective trenches and including a plurality of second upper surfaces continuous with the first upper surfaces in a second direction which is perpendicular to the first direction, respectively, a plurality of interlayer insulating films formed above the first and the second upper surfaces, and a plurality of contact plugs defined in the interlayer insulating films so as to connect with the first upper surfaces of the semiconductor substrate. Each first upper surface is inclined in the second direction so as to be lowered from a central part toward interfaces between each first upper surface and the second upper surfaces adjacent to each first upper surface.Type: GrantFiled: March 29, 2006Date of Patent: February 24, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Ryuichi Kamo
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Publication number: 20080305612Abstract: A semiconductor device such as a flash memory includes a semiconductor substrate, two gate insulating films formed on the substrate so as to have a first film thickness and a second film thickness smaller than the first film thickness respectively, and a polycrystalline silicon film formed on the gate insulating films so that parts of the polycrystalline silicon film on the respective gate insulating films are on a level with each other and serving as a gate electrode. The substrate is formed with a recess defined by a bottom and sidewalls substantially perpendicular to the bottom, the recess corresponding to the part of the gate insulating film with the first film thickness.Type: ApplicationFiled: June 2, 2008Publication date: December 11, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryuichi KAMO, Minori KAJIMOTO, Hiroaki TSUNODA, Yuuichiro MURAHAMA
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Patent number: 7381641Abstract: A semiconductor device such as a flash memory includes a semiconductor substrate, two gate insulating films formed on the substrate so as to have a first film thickness and a second film thickness smaller than the first film thickness respectively, and a polycrystalline silicon film formed on the gate insulating films so that parts of the polycrystalline silicon film on the respective gate insulating films are on a level with each other and serving as a gate electrode. The substrate is formed with a recess defined by a bottom and sidewalls substantially perpendicular to the bottom, the recess corresponding to the part of the gate insulating film with the first film thickness.Type: GrantFiled: June 22, 2005Date of Patent: June 3, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Ryuichi Kamo, Minori Kajimoto, Hiroaki Tsunoda, Yuuichiro Murahama
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Publication number: 20070293018Abstract: In fabrication of a semiconductor device, a first insulating film, electrode film and silicon nitride film sequentially stacked on a semiconductor substrate are etched with the substrate so that a trench is formed. The electrode film is then exposed. A second insulating film buried in the trench is isotropically etched so that an upper side wall of the electrode film is exposed, so that a side end of an upper surface of the insulating film is located between the upper surfaces of the substrate and electrode film and so that a middle upper portion of an upper surface of the second insulating film is higher than the side end and lower than the upper surface of the first electrode film, A third insulating film is formed on the upper surface of the first electrode film so as to entirely cover the upper surface of the second insulating film.Type: ApplicationFiled: August 13, 2007Publication date: December 20, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryuichi KAMO, Hisashi Watanobe, Tadashi Iguchi
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Patent number: 7276757Abstract: A semiconductor device includes a semiconductor substrate including a first upper surface, a first insulating film including an upper portion including a first side wall having a first upper end and a second upper surface having a second upper end, a second insulating film formed on the first upper surface of the substrate, a floating gate electrode including a third upper surface, a second side wall and a lower surface, a third insulating film, and a control gate electrode. A height of the second upper end is lower than a height of the third upper surface and higher than a height of the first upper end relative to the first upper surface. The first upper end is located at a position higher than the lower surface of the floating gate electrode. The entire second side wall is aligned with the first side wall of the first insulating film.Type: GrantFiled: February 18, 2005Date of Patent: October 2, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Ryuichi Kamo, Hisashi Watanobe, Tadashi Iguchi
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Publication number: 20060220017Abstract: A semiconductor device includes a semiconductor substrate formed with a trench, an element isolation region formed by burying a first insulating film in the trench, an element forming area divided by the element isolation region on an area of a surface of the semiconductor substrate, a second insulating film formed on an upper side of the element forming area, and a connecting hole defined in the second insulating film so as to correspond to an electrode forming area of the element forming area. A part of the element forming area in which the connecting hole is formed has a surface which is inclined so as to be lowered from a central part thereof toward an interface between the element isolation region and the element forming area.Type: ApplicationFiled: March 29, 2006Publication date: October 5, 2006Applicant: Kabushiki Kaisha ToshibaInventor: Ryuichi Kamo
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Publication number: 20060033148Abstract: A semiconductor device such as a flash memory includes a semiconductor substrate, two gate insulating films formed on the substrate so as to have a first film thickness and a second film thickness smaller than the first film thickness respectively, and a polycrystalline silicon film formed on the gate insulating films so that parts of the polycrystalline silicon film on the respective gate insulating films are on a level with each other and serving as a gate electrode. The substrate is formed with a recess defined by a bottom and sidewalls substantially perpendicular to the bottom, the recess corresponding to the part of the gate insulating film with the first film thickness.Type: ApplicationFiled: June 22, 2005Publication date: February 16, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryuichi Kamo, Minori Kajimoto, Hiroaki Tsunoda, Yuuichiro Murahama
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Publication number: 20050221578Abstract: A semiconductor device includes a semiconductor substrate having an upper surface, a trench formed in the semiconductor substrate, a first insulating film formed on the semiconductor substrate so as to be located at opposite sides of the trench, a polycrystalline silicon film stacked on the first insulating film, the polycrystalline silicon film having an upper surface, a second insulating film buried in the trench and having an upper surface end located lower than the upper surface of the polycrystalline silicon film and higher than the upper surface of the semiconductor substrate, the second insulating film having a central upper surface located nearer to the upper surface of the polycrystalline silicon film than the upper surface end thereof.Type: ApplicationFiled: February 18, 2005Publication date: October 6, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryuichi Kamo, Hisashi Watanobe, Tadashi Iguchi