Patents by Inventor Ryuichi KANOH

Ryuichi KANOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294735
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.
    Type: Grant
    Filed: June 14, 2024
    Date of Patent: May 6, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Publication number: 20250133219
    Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 24, 2025
    Inventors: Kiyofumi ABE, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20250133207
    Abstract: An encoder that encodes a video includes a processor and memory. Using the memory, the processor: derives a prediction error of an image included in the video, by subtracting a prediction image of the image from the image; determines a secondary transform basis based on a primary transform basis, the primary transform basis being a transform basis for a primary transform to be performed on the prediction error, the secondary transform basis being a transform basis for a secondary transform to be performed on a result of the primary transform; performs the primary transform on the prediction error using the primary transform basis; performs the secondary transform on a result of the primary transform using the secondary transform basis; performs quantization on a result of the secondary transform; and encodes a result of the quantization as data of the image.
    Type: Application
    Filed: December 26, 2024
    Publication date: April 24, 2025
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Kiyofumi ABE, Takahiro NISHI
  • Patent number: 12284341
    Abstract: A decoder includes a memory and processing circuitry. The processing circuitry, in operation, changes values of pixels in a first block and a second block to filter a boundary therebetween, using clipping such that change amounts of the respective values are within respective clip widths. The clip widths for the pixels in the first block and the second block are selected based on block sizes of the first block and the second block. The pixels in the first block include a first pixel located at a first position, and the pixels in the second block include a second pixel located at a second position corresponding to the first position with respect to the boundary. The clip widths include a first clip width and a second clip width corresponding to the first pixel and the second pixel, respectively, and the first clip width is different from the second width.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: April 22, 2025
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20250113051
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Jing Ya LI, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 12267521
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs a primary transform on a derived prediction error, performs a secondary transform on a result of the primary transform, quantizes a result of the secondary transform, and encodes a result of the quantization as data of an image. When a current block to be processed has a predetermined shape, the encoder performs the secondary transform using, among secondary transform basis candidates that are secondary bases usable in the secondary transform, only a secondary transform basis candidate having a size that is not largest size containable in the current block.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: April 1, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • Publication number: 20250106424
    Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20250106423
    Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, obtains a current block from a coding tree unit (CTU); determines whether inter prediction is to be applied to the current block; in response to determining that the inter prediction is to be applied, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first and second values.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 27, 2025
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 12262049
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
    Type: Grant
    Filed: December 19, 2023
    Date of Patent: March 25, 2025
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20250097438
    Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.
    Type: Application
    Filed: December 4, 2024
    Publication date: March 20, 2025
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20250097432
    Abstract: When intra prediction is to be used, an encoder determines whether an adaptive basis selection mode is to be used and whether a size of the current block matches a determined size. When the adaptive basis selection mode is to be used and the size matches the determined size, the encoder fixes the first transform basis for the current block to a first determined transform basis in the adaptive basis selection mode, and generates first transform coefficients by performing first transform of residual signals of the current block using the first determined transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode is not the determined mode.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Inventors: Masato OHKAWA, Hideo SAITOU, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 12244796
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: November 15, 2023
    Date of Patent: March 4, 2025
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Patent number: 12244797
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. Using the memory, the processing circuitry is configured to: change values of pixels in a first block and a second block to filter a boundary between the first block and the second block. The pixels include type one pixels and type two pixels different from the type one pixels. The first set of filter coefficients applied to the type one pixels in the first block and the second set of filter coefficients applied to the type one pixels in the second block are selected to be asymmetrical with respect to the boundary.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: March 4, 2025
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20250071275
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.
    Type: Application
    Filed: November 14, 2024
    Publication date: February 27, 2025
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20250071281
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20250071316
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Application
    Filed: November 15, 2024
    Publication date: February 27, 2025
    Inventors: Virginie DRUGEON, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 12238278
    Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.
    Type: Grant
    Filed: September 5, 2023
    Date of Patent: February 25, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh
  • Publication number: 20250056034
    Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.
    Type: Application
    Filed: October 30, 2024
    Publication date: February 13, 2025
    Inventors: Takashi HASHIMOTO, Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 12219137
    Abstract: An encoder that encodes a video includes a processor and memory. Using the memory, the processor: derives a prediction error of an image included in the video, by subtracting a prediction image of the image from the image; determines a secondary transform basis based on a primary transform basis, the primary transform basis being a transform basis for a primary transform to be performed on the prediction error, the secondary transform basis being a transform basis for a secondary transform to be performed on a result of the primary transform; performs the primary transform on the prediction error using the primary transform basis; performs the secondary transform on a result of the primary transform using the secondary transform basis; performs quantization on a result of the secondary transform; and encodes a result of the quantization as data of the image.
    Type: Grant
    Filed: November 29, 2023
    Date of Patent: February 4, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • Patent number: 12219155
    Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: February 4, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li