Patents by Inventor Ryuichi Kimura
Ryuichi Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250370165Abstract: Through the formation of a protective film on a fine uneven structure formed on a surface of a synthetic resin substrate, an optical component with a high anti-reflection effect under a high temperature environment is produced. The method for producing an optical component according to the present disclosure includes a fine uneven structure forming step of changing a surface of a substrate by ion irradiation, so as to form a fine uneven structure on the substrate surface, and a protective film forming step of evaporating and depositing a deposition material on the surface of the substrate, so as to form a protective film on the fine uneven structure formed on the surface of the substrate.Type: ApplicationFiled: August 25, 2023Publication date: December 4, 2025Applicant: KOIDE JAPAN LTD.Inventors: RYUICHI KIMURA, TAKEKI NAKADA, TSUTOMU KURIHARA, YASUHIRO SEKINE
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Patent number: 12479011Abstract: A substrate processing system includes substrate processing apparatuses and a group management device. The substrate processing apparatuses each include a plan creating section. The plan creating section creates a plan indicating a timing when a processing liquid is used and a flow rate of the processing liquid. The processing liquid is supplied to the substrate processing apparatuses from a single resource system. The group management device includes a processing section. The processing section determines whether the total flow rate of the processing liquid to be used by the substrate processing apparatuses exceeds a threshold value based on the plans created by the substrate processing apparatuses. When determining that the total flow rate exceeds the threshold value, the processing section instructs one of the substrate processing apparatuses to adjust the plan thereof.Type: GrantFiled: September 19, 2022Date of Patent: November 25, 2025Assignee: SCREEN Holdings Co., Ltd.Inventors: Ryuichi Kimura, Naruhisa Miyazaki, Hiroakira Matsui
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Publication number: 20250201609Abstract: A substrate processing system includes a first processing apparatus, a second processing apparatus, and an integrated control device. The first processing apparatus executes first processing on substrates in accordance with a job. The second processing apparatus executes second processing on substrates in accordance with a job. The integrated control device generates a first virtual job and a second virtual job in accordance with a command to create an integrated job, received from an external control device. The first processing apparatus executes at least part of the first processing on substrates in accordance with the first virtual job. The second processing apparatus executes, in accordance with the second virtual job, at least part of the second processing on the substrates that have been processed by the first processing apparatus.Type: ApplicationFiled: December 11, 2024Publication date: June 19, 2025Inventors: Ryuichi KIMURA, Hiroakira MATSUI, Yasushi KUBO
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Publication number: 20230101147Abstract: A substrate processing system includes substrate processing apparatuses and a group management device. The substrate processing apparatuses each include a plan creating section. The plan creating section creates a plan indicating a timing when a processing liquid is used and a flow rate of the processing liquid. The processing liquid is supplied to the substrate processing apparatuses from a single resource system. The group management device includes a processing section. The processing section determines whether the total flow rate of the processing liquid to be used by the substrate processing apparatuses exceeds a threshold value based on the plans created by the substrate processing apparatuses. When determining that the total flow rate exceeds the threshold value, the processing section instructs one of the substrate processing apparatuses to adjust the plan thereof.Type: ApplicationFiled: September 19, 2022Publication date: March 30, 2023Inventors: Ryuichi KIMURA, Naruhisa MIYAZAKI, Hiroakira MATSUI
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Patent number: 11018996Abstract: A packet transfer device includes a circuit configured to include a first queue to store a first packet classified into a high priority class and a second queue to store a second packet classified into a low priority class, a memory configured to store data configured to indicate possibilities of output for the first packet and the second packet for each time slot, a processor coupled to the memory and configured to control the output of the first packet and the second packet for each time slot according to the data stored in the memory, count a number of discards of the second packet within the second queue in a predetermined cycle, and change the data stored in the memory, when the number of discards is less than a first predetermined value, so as to reduce an output period of the second packet every the time slot.Type: GrantFiled: May 7, 2019Date of Patent: May 25, 2021Assignee: FUJITSU LIMITEDInventors: Norikazu Hikimochi, Ryuichi Kimura, Shigemori Ookawa
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Publication number: 20190356612Abstract: A packet transfer device includes a circuit configured to include a first queue to store a first packet classified into a high priority class and a second queue to store a second packet classified into a low priority class, a memory configured to store data configured to indicate possibilities of output for the first packet and the second packet for each time slot, a processor coupled to the memory and configured to control the output of the first packet and the second packet for each time slot according to the data stored in the memory, count a number of discards of the second packet within the second queue in a predetermined cycle, and change the data stored in the memory, when the number of discards is less than a first predetermined value, so as to reduce an output period of the second packet every the time slot.Type: ApplicationFiled: May 7, 2019Publication date: November 21, 2019Applicant: FUJITSU LIMITEDInventors: NORIKAZU HIKIMOCHI, Ryuichi KIMURA, SHIGEMORI OOKAWA
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Patent number: 10298440Abstract: A transmission apparatus executes a reception processing that receives a first alarm detected in a first transmission apparatus different from the own apparatus from among a plurality of transmission apparatus from a second transmission apparatus different from the own apparatus from among the plurality of transmission apparatus, executes a detection processing that detects a second alarm of the own apparatus, executes a mask processing that masks alarms including the first alarm received by the reception processing and the second alarm detected by the detection processing, and executes a sending processing that sends an alarm that is not masked by the mask processing from among the alarms to a third transmission apparatus different from the own apparatus and the second transmission apparatus from among the plurality of transmission apparatus or sending the alarm to a given apparatus different from any of the plurality of transmission apparatus.Type: GrantFiled: June 7, 2017Date of Patent: May 21, 2019Assignee: FUJITSU LIMITEDInventors: Jumpei Hongo, Takayuki Moriyama, Ryuichi Kimura
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Publication number: 20170373924Abstract: A transmission apparatus executes a reception processing that receives a first alarm detected in a first transmission apparatus different from the own apparatus from among a plurality of transmission apparatus from a second transmission apparatus different from the own apparatus from among the plurality of transmission apparatus, executes a detection processing that detects a second alarm of the own apparatus, executes a mask processing that masks alarms including the first alarm received by the reception processing and the second alarm detected by the detection processing, and executes a sending processing that sends an alarm that is not masked by the mask processing from among the alarms to a third transmission apparatus different from the own apparatus and the second transmission apparatus from among the plurality of transmission apparatus or sending the alarm to a given apparatus different from any of the plurality of transmission apparatus.Type: ApplicationFiled: June 7, 2017Publication date: December 28, 2017Applicant: FUJITSU LIMITEDInventors: JUMPEI HONGO, Takayuki MORIYAMA, Ryuichi KIMURA
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Patent number: 9853892Abstract: A control method executed by an information processing device including a memory configured to store information on a plurality of temporary routes set for each kind of service, the control method includes receiving a routing request from a switch among a plurality of switches; extracting, from the memory, a temporary route corresponding to a service related to the routing request when it is determined that processing congestion of the information processing device occurs; setting the extracted temporary route for one or more related switches among the plurality of switches; determining a route corresponding to the service, based on a predetermined condition of the service, when it is determined that the processing congestion of the information processing device has subsided; and setting the determined route for the one or more related switches among the plurality of switches.Type: GrantFiled: July 29, 2015Date of Patent: December 26, 2017Assignee: FUJITSU LIMITEDInventors: Hiroyuki Fujii, Koichiro Hojo, Akira Sugiyama, Ryuichi Kimura, Shuang Xu
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Publication number: 20170330785Abstract: [PROBLEM] In accordance with one aspect of the present invention, to provide a tape and a sheet that make it possible to reduce cracking that would otherwise occur at the chip side face during dicing. [SOLUTION MEANS] One aspect of the present invention relates to a sheet. The sheet comprises dicing film. The dicing film comprises a base layer and an adhesive layer disposed on the base layer. The sheet further comprises a semiconductor backside protective film disposed on the adhesive layer. Shear adhesive strength at 25° C. of the semiconductor backside protective film with respect to a silicon chip is not less than 1.7 kgf/mm2.Type: ApplicationFiled: May 8, 2017Publication date: November 16, 2017Inventors: Ryuichi KIMURA, Naohide TAKAMOTO
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Patent number: 9768050Abstract: It is an object of the present invention to provide a film for semiconductor back surface having reworkability, and an application of the film. A film for semiconductor back surface has: an adhering strength at 70° C. of 7 N/10 mm or less to a wafer before the film is thermally cured; and a rupture elongation at 25° C. of 700% or less. The film for semiconductor back surface preferably has a degree of swelling due to ethanol of 1% by weight or more. The film for semiconductor back surface preferably contains an acrylic resin.Type: GrantFiled: May 31, 2016Date of Patent: September 19, 2017Assignee: NITTO DENKO CORPORATIONInventors: Naohide Takamoto, Ryuichi Kimura
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Publication number: 20170140973Abstract: [PROBLEM] To provide a laminated body and so forth that makes it possible to reduce cracking that would otherwise occur at the chip side face during dicing. [SOLUTION MEANS] This relates to a laminated body comprising a dicing sheet and a semiconductor backside protective film. The dicing sheet comprises a base layer and an adhesive layer arranged over the base layer. The semiconductor backside protective film is arranged over the adhesive layer. Tensile storage modulus of the semiconductor backside protective film following curing is not less than 1 GPa over the entire range 23° C. to 80° C.Type: ApplicationFiled: November 11, 2016Publication date: May 18, 2017Applicant: NITTO DENKO CORPORATIONInventors: Ryuichi KIMURA, Naohide TAKAMOTO
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Publication number: 20170140948Abstract: A method is provided for manufacturing a semiconductor package capable of preventing positional dislocation of semiconductor chip(s) as a result of contraction due to thermal curing of resin(s). This relates to a semiconductor package manufacturing method comprising an operation in which semiconductor chip(s) is/are arranged over semiconductor backside protective film which is arranged over an adhesive sheet; an operation in which semiconductor backside protective film is cured; and an operation in which semiconductor chip(s) is/are sealed with resin.Type: ApplicationFiled: November 11, 2016Publication date: May 18, 2017Inventors: Ryuichi Kimura, Naohide Takamoto, Goji Shiga
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Publication number: 20170140972Abstract: A laminated body comprising a dicing sheet and a semiconductor backside protective film, in which the dicing sheet comprises a base layer and an adhesive layer arranged over the base layer, the semiconductor backside protective film is arranged over the adhesive layer, the dicing sheet is provided with a property such that application of heat thereto causes contraction thereof, and with a property such that heat treatment thereof for one minute at 100° C. causes a second length in an MD direction following heat treatment to be not greater than 95% when expressed as a percentage such that a first length in the MD direction prior to heat treatment is taken to be 100%.Type: ApplicationFiled: November 11, 2016Publication date: May 18, 2017Applicant: NITTO DENKO CORPORATIONInventors: Ryuichi KIMURA, Yuichiro SHISHIDO, Naohide TAKAMOTO
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Publication number: 20170140974Abstract: [PROBLEM] To provide a laminated body and so forth that makes it possible to prevent pieces of post-dicing semiconductor backside protective film from sticking to one another. [SOLUTION MEANS] This relates to a laminated body comprising a two-sided adhesive sheet and a semiconductor backside protective film arranged over the two-sided adhesive sheet. The two-sided adhesive sheet comprises a first adhesive layer, a second adhesive layer, and a base layer. The base layer is disposed between the first adhesive layer and the second adhesive layer. The first adhesive layer has a property such that application of heat causes reduction in the peel strength thereof. The first adhesive layer is disposed between the semiconductor backside protective film and the base layer.Type: ApplicationFiled: November 11, 2016Publication date: May 18, 2017Applicant: NITTO DENKO CORPORATIONInventors: Ryuichi KIMURA, Naohide TAKAMOTO
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Publication number: 20160351432Abstract: It is an object of the present invention to provide a film for semiconductor back surface having reworkability, and an application of the film. A film for semiconductor back surface has: an adhering strength at 70° C. of 7 N/10 mm or less to a wafer before the film is thermally cured; and a rupture elongation at 25° C. of 700% or less. The film for semiconductor back surface preferably has a degree of swelling due to ethanol of 1% by weight or more. The film for semiconductor back surface preferably contains an acrylic resin.Type: ApplicationFiled: May 31, 2016Publication date: December 1, 2016Applicant: NITTO DENKO CORPORATIONInventors: Naohide TAKAMOTO, Ryuichi KIMURA
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Publication number: 20160322251Abstract: The film for a semiconductor device has a plurality of films with attached dicing tape for the backside of a flip-chip type semiconductor arranged on a separator at a prescribed interval and an outer sheet arranged outside the film with attached dicing tape for the backside of a flip-chip type semiconductor; the film with attached dicing tape for the backside of a flip-chip type semiconductor has a dicing tape and a film for the backside of a flip-chip type semiconductor; and when the length of the narrowest portion of the outer sheet is set to G and the length from the long side of the separator to the dicing tape is set to F, G is within the range from 0.2 times to 0.95 times F.Type: ApplicationFiled: April 27, 2016Publication date: November 3, 2016Applicant: NITTO DENKO CORPORATIONInventors: Naohide TAKAMOTO, Ryuichi KIMURA
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Publication number: 20160322308Abstract: Disclosed are a rear surface-protective film making it possible to detect, after this film is bonded to a semiconductor wafer, a notch in this wafer, and to prevent the rear surface-protective film from being stuck out; and others. Disclosed are a rear surface-protective filmmaking it possible to detect, after this film is bonded to a semiconductor wafer, a notch in this wafer; and others. An aspect of the invention relates to a rear surface-protective film for being bonded to a rear surface of a semiconductor wafer. The film is smaller in outer circumstance than the semiconductor wafer, and a notch is provided in the film. Another aspect of the invention relates to a rear surface-protective film having a total light transmittance of 3% or more at a wavelength of 555 nm.Type: ApplicationFiled: April 28, 2016Publication date: November 3, 2016Applicant: NITTO DENKO CORPORATIONInventors: Naohide TAKAMOTO, Ryuichi KIMURA
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Publication number: 20160322272Abstract: Disclosed are an integrated film making it possible to detect, after the integrated film is bonded to a semiconductor wafer, a notch in this wafer; and others. An aspect of the invention relates to an integrated film including a dicing tape including a substrate and a pressure-sensitive adhesive layer disposed on the substrate; and a rear surface-protective film disposed on the pressure-sensitive adhesive layer. This rear surface-protective film has a total light transmittance of 3% or more at a wavelength of 555 nm. Another aspect of the invention relates to an integrated film having a total light transmittance of 3% or more at a wavelength of 555 nm.Type: ApplicationFiled: April 28, 2016Publication date: November 3, 2016Applicant: NITTO DENKO CORPORATIONInventors: Naohide TAKAMOTO, Ryuichi KIMURA
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Publication number: 20160322252Abstract: Disclosed is a rear surface-protective film making it possible to watch, across this rear surface-protective film, a crack of a semiconductor element through an infrared camera, and the like. is the invention relates to a rear surface-protective film for protecting a rear surface of a semiconductor element, the film having a parallel light transmittance of 15% or more at a wavelength of 800 nm. The ratio of the parallel light transmittance at a wavelength of 800 nm to the parallel light transmittance at a wavelength of 532 nm in the rear surface-protective film is preferably 2 or more.Type: ApplicationFiled: April 28, 2016Publication date: November 3, 2016Applicant: NITTO DENKO CORPORATIONInventors: Naohide TAKAMOTO, Ryuichi KIMURA