Patents by Inventor Ryuichi Ohzeki

Ryuichi Ohzeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8291360
    Abstract: A data conversion apparatus for converting circuit description related to a dynamically-reconfigurable circuit to circuit configuration information, the data conversion apparatus includes a first generation section that generates a data flow graph from the circuit description; a segment count determining section that determines a number of segments for segmenting the data flow graph generated by the first generation section; a virtual circuit creating section that creates a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined by the segment count determining section; a second generation section that generates, from the circuit description, a data flow graph corresponding to the virtual circuit created by the virtual circuit creating section; and a conversion section that allocates and adjusts the resources of the virtual circuit in accordance with the data flow graph.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: October 16, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hayato Higuchi, Shinichi Sutou, Tsuguchika Tabaru, Manabu Matsuyama, Ryuichi Ohzeki, Toshihiro Suzuki
  • Patent number: 8266416
    Abstract: A dynamic reconfiguration supporting method that generates a driver function to cause a dynamic reconfiguration circuit to execute a program of an application described in a predetermined language, includes acquiring a configuration defining file representing a configuration of a cluster of the dynamic reconfiguration circuit in execution of the process of the application, generating an address map representing an address of a processing element (to be referred to as “PE” hereinafter) in the cluster on the basis of the configuration defining file acquired by the acquiring operation, generating a driver function that associates the function and an address of the PE which executes the function with reference to the address map, when a PE which executes a function described in the application is allocated from the PE, and creating a driver function file that stores the driver function.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: September 11, 2012
    Assignee: Fujitsu Limited
    Inventors: Koji Ishihara, Tetsuo Kawano, Kyoji Sato, Tsuguchika Tabaru, Manabu Matsuyama, Ryuichi Ohzeki, Masato Kondo
  • Patent number: 8234613
    Abstract: A computer-readable recording medium that stores therein a computer program for designing a dynamic reconfigurable circuit in which a plurality of circuit configurations are implemented with a single circuit, the computer program enabling a computer to execute: acquiring a plurality of contexts having connection information between operation devices and network modules, wherein the operation devices and network modules are disposed in clusters, and connection information among the network modules; calculating a cluster count of the clusters and an operation device count for each operation device type of the operation devices in each cluster based on the acquired plurality of contexts; generating a circuit configuration for each context in which disposition of the operation devices in each cluster and connection of the network modules are made to satisfy the calculated cluster count and operation device count; and outputting the generated circuit configuration.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tsuguchika Tabaru, Ryuichi Ohzeki, Katsumoto Nomimura, Toshihiro Suzuki, Kiyomitsu Katou
  • Publication number: 20100017776
    Abstract: A computer-readable recording medium that stores therein a computer program for designing a dynamic reconfigurable circuit in which a plurality of circuit configurations are implemented with a single circuit, the computer program enabling a computer to execute: acquiring a plurality of contexts having connection information between operation devices and network modules, wherein the operation devices and network modules are disposed in clusters, and connection information among the network modules; calculating a cluster count of the clusters and an operation device count for each operation device type of the operation devices in each cluster based on the acquired plurality of contexts; generating a circuit configuration for each context in which disposition of the operation devices in each cluster and connection of the network modules are made to satisfy the calculated cluster count and operation device count; and outputting the generated circuit configuration.
    Type: Application
    Filed: July 2, 2009
    Publication date: January 21, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Tsuguchika Tabaru, Ryuichi Ohzeki, Katsumoto Nomimura, Toshihiro Suzuki, Kiyomitsu Katou
  • Publication number: 20100017761
    Abstract: A data conversion apparatus for converting circuit description related to a dynamically-reconfigurable circuit to circuit configuration information, the data conversion apparatus includes a first generation section that generates a data flow graph from the circuit description; a segment count determining section that determines a number of segments for segmenting the data flow graph generated by the first generation section; a virtual circuit creating section that creates a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined by the segment count determining section; a second generation section that generates, from the circuit description, a data flow graph corresponding to the virtual circuit created by the virtual circuit creating section; and a conversion section that allocates and adjusts the resources of the virtual circuit in accordance with the data flow graph.
    Type: Application
    Filed: July 15, 2009
    Publication date: January 21, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Hayato HIGUCHI, Shinichi Sutou, Tsuguchika Tabaru, Manabu Matsuyama, Ryuichi Ohzeki, Toshihiro Suzuki
  • Publication number: 20090164773
    Abstract: A dynamic reconfiguration supporting method that generates a driver function to cause a dynamic reconfiguration circuit to execute a program of an application described in a predetermined language, includes acquiring a configuration defining file representing a configuration of a cluster of the dynamic reconfiguration circuit in execution of the process of the application, generating an address map representing an address of a processing element (to be referred to as “PE” hereinafter) in the cluster on the basis of the configuration defining file acquired by the acquiring operation, generating a driver function that associates the function and an address of the PE which executes the function with reference to the address map, when a PE which executes a function described in the application is allocated from the PE, and creating a driver function file that stores the driver function.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 25, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Koji ISHIHARA, Tetsuo Kawano, Kyoji Sato, Tsuguchika Tabaru, Manabu Matsuyama, Ryuichi Ohzeki, Masato Kondo