Abstract: There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portions 7 formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor element 2 flip-chip bonded to the inner lead portions via bumps 3; and an encapsulating resin 4 encapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin.

Abstract: There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portions 7 formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor element 2 flip-chip bonded to the inner lead portions via bumps 3; and an encapsulating resin 4 encapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin.

Abstract: A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Abstract: The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Abstract: A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Abstract: There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portions 7 formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor element 2 flip-chip bonded to the inner lead portions via bumps 3; and an encapsulating resin 4 encapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin.

Abstract: Disclosed is a semiconductor device 10 comprising a first semiconductor element 11 with an arrangement of first element electrodes 12, a second semiconductor element 13 with an arrangement of second element electrodes 14, a connection member 15 electrically connecting together a portion 12b of the first element electrodes 12 and the second element electrodes 14, an insulation layer 17 covering a major surface 11a of the first semiconductor element 11 and a backside surface 13b of the second semiconductor element 13, a wiring layer 22 formed on the insulation layer 17 and electrically connected to the first element electrode portion 12b exposed in an opening portion 21, and an external electrode 23 formed, as a portion of the wiring layer 22, on the insulation layer 17.

Abstract: A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Abstract: A first element electrode and a second element electrode connected electrically to a semiconductor element on a substrate are formed, and then an insulating film is formed on the substrate including the element electrodes. Thereafter, a first opening for exposing the first element electrode and a second opening for exposing the second element electrode are formed on the insulating film. Then, a first external electrode connected to the first element electrode via the first opening is formed immediately above the first element electrode. Furthermore, a second external electrode and a connecting wire having one end connected to the second element electrode via the second opening and the other end connected to the second external electrode are formed on the insulating film.

Abstract: The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Abstract: A low elasticity layer (20) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate (10). On the low elasticity layer (20), lands (32) serving as external electrodes are disposed, and pads (30) on the element electrodes, the lands (32) and metal wires (31) for connecting them are integrally formed as a metal wiring pattern (33). A solder resist film (50) having an opening for exposing a part of each land (32) is formed, and a metal ball (40) is provided on the land (32) in the opening. The low elasticity layer (20) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires (31).

Abstract: A low elasticity layer (20) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate (10). On the low elasticity layer (20), lands (32) serving as external electrodes are disposed, and pads (30) on the element electrodes, the lands (32) and metal wires (31) for connecting them are integrally formed as a metal wiring pattern (33). A solder resist film (50) having an opening for exposing a part of each land (32) is formed, and a metal ball (40) is provided on the land (32) in the opening. The low elasticity layer (20) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires (31).

Abstract: The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Abstract: A semiconductor device includes a semiconductor chip, an insulating layer formed on a region excluding the plurality of electrode pads on the principal surface of the semiconductor chip, a plurality of contact pads arranged on the insulating layer, a wiring layer electrically connected to at least one of the plurality of electrode pads and electrically connected to at least one of the plurality of contact pads, thereby establishing rewiring connection, an insulative resin layer formed on a region excluding the plurality of contact pads on the principal surface of the semiconductor chip, a protruded electrode provided on each of the plurality of contact pads, and an underfill material layer provided on the insulative resin layer in such a manner that the top of the protruded electrode is exposed.

Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; and a resin encapsulant. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate and a second bottom face of the semiconductor chip is in contact with the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. A level difference exists between a first bottom face and the second bottom face of the semiconductor chip. The first and second bottom faces are respectively located at a peripheral portion and a central portion of the semiconductor chip. A part of the resin encapsulant is interposed between the first bottom face and the upper surface of the wiring substrate.

Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.

Abstract: A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Abstract: Disclosed is a semiconductor device 10 comprising a first semiconductor element 11 with an arrangement of first element electrodes 12, a second semiconductor element 13 with an arrangement of second element electrodes 14, a connection member 15 electrically connecting together a portion 12b of the first element electrodes 12 and the second element electrodes 14, an insulation layer 17 covering a major surface 11a of the first semiconductor element 11 and a backside surface 13b of the second semiconductor element 13, a wiring layer 22 formed on the insulation layer 17 and electrically connected to the first element electrode portion 12b exposed in an opening portion 21, and an external electrode 23 formed, as a portion of the wiring layer 22, on the insulation layer 17.

Abstract: The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Abstract: Disclosed is a semiconductor device 10 comprising a first semiconductor element 11 with an arrangement of first element electrodes 12, a second semiconductor element 13 with an arrangement of second element electrodes 14, a connection member 15 electrically connecting together a portion 12b of the first element electrodes 12 and the second element electrodes 14, an insulation layer 17 covering a major surface 11a of the first semiconductor element 11 and a backside surface 13b of the second semiconductor element 13, a wiring layer 22 formed on the insulation layer 17 and electrically connected to the first element electrode portion 12b exposed in an opening portion 21, and an external electrode 23 formed, as a portion of the wiring layer 22, on the insulation layer 17.