Abstract: An automatic clock phase adjusting device is employed principally in a picture display to adjust automatically the phase of a clock signal given to an A/D converter which converts an analog image signal into a corresponding digital image signal. The automatic clock phase adjusting device comprises a delay circuit that delays the phase of the clock signal; an image level detecting circuit that detects the image level of a horizontal image starting portion of the digital image signal and the image level of an image terminating portion of the digital image signal; and a control circuit that controls a delay by which the delay circuit delays the clock signal on the basis of the output signal of the image level detecting circuit.