Patents by Inventor Ryuichi Takano
Ryuichi Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230058327Abstract: An information processing apparatus includes circuitry. The circuitry displays one or more screens that receive an operation by a user. The circuitry identifies an operation item corresponding to the operation based on display information of the one or more screens, according to the operation by on the one or more screens. The circuitry generates an operation component associated with a condition corresponding to the operation item. The circuitry generates a flow of operations based on the operation component according to an order of operations by the user. The circuitry compares multiple flows with one another, to extract a difference between multiple operation components included in one of the multiple flows and multiple operation components included in another one of the multiple flows. The circuitry adds an operation component of a conditional branch before one of the multiple operation components for which the difference is extracted.Type: ApplicationFiled: July 28, 2022Publication date: February 23, 2023Applicant: Ricoh Company, Ltd.Inventors: Tomoyuki TAZUKE, Ryuichi TAKANO, Tsuyoshi YAMADA
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Publication number: 20230056860Abstract: An information processing apparatus includes circuitry. The circuitry displays one or more screens that receive an operation by a user. The circuitry identifies an operation item corresponding to the operation based on display information of the one or more screens, according to the operation on the one or more screens. The circuitry generates an operation component associated with a condition corresponding to the operation item. The circuitry generates a flow of operations based on the operation component according to an order of operations including the operation by the user, the flow of operations being a flow to be processed by a computer that executes an application.Type: ApplicationFiled: July 28, 2022Publication date: February 23, 2023Applicant: Ricoh Company, Ltd.Inventors: Tomoyuki TAZUKE, Ryuichi TAKANO, Tsuyoshi YAMADA
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Patent number: 9362250Abstract: The present invention provides a bonding device and a bonding method with a high operation ratio by solving the problems of conventional techniques. In the present invention, a collet holder grasping a used collet is inserted from a first opening portion with the upper face open; the used collet is engaged with first engagement portions provided at the first opening portion of a discarding unit; the used collet is removed from the collet holder to be discarded by lifting the collet holder; the collet holder is inserted from a second opening portion with the upper face open of a supplying unit; the uppermost unused collet among plural stacked unused collets is grasped; and the uppermost unused collet ejected from the first opening portion is attached to the collet holder.Type: GrantFiled: March 4, 2013Date of Patent: June 7, 2016Assignee: Fasford Technology Co., Ltd.Inventors: Ryuichi Takano, Naoki Okamoto
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Patent number: 8783319Abstract: The invention has an object to provide a foreign substance removing device that is capable of quickly and efficiently cleaning substrate surfaces regardless of the size thereof and preventing readhesion of once removed foreign substances as well as to provide a die bonder equipped with the same. The foreign substance removing device of the invention includes: a pickup device to which a dicing film carrying dies thereon is fixed; and a collet for picking up a die separated from the dicing film and placing the die on a substrate having an adhesive applied thereon, and operates to remove foreign substances on the substrate in preparation for application of the adhesive onto the substrate. The foreign substance removing device includes a cleaning nozzle integrating an air outlet orifice and an air inlet orifice.Type: GrantFiled: September 2, 2011Date of Patent: July 22, 2014Assignee: Hitachi High-Tech Instruments Co., Ltd.Inventors: Takashi Yamagami, Ryuichi Takano, Hiroshi Maki, Masayuki Mochizuki
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Patent number: 8703583Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: GrantFiled: November 13, 2009Date of Patent: April 22, 2014Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Publication number: 20140069564Abstract: The present invention provides a bonding device and a bonding method with a high operation ratio by solving the problems of conventional techniques. In the present invention, a collet holder grasping a used collet is inserted from a first opening portion with the upper face open; the used collet is engaged with first engagement portions provided at the first opening portion of a discarding unit; the used collet is removed from the collet holder to be discarded by lifting the collet holder; the collet holder is inserted from a second opening portion with the upper face open of a supplying unit; the uppermost unused collet among plural stacked unused collets is grasped; and the uppermost unused collet ejected from the first opening portion is attached to the collet holder.Type: ApplicationFiled: March 4, 2013Publication date: March 13, 2014Applicant: HITACHI HIGH-TECH INSTRUMENTS CO., LTD.Inventors: Ryuichi TAKANO, Naoki OKAMOTO
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Publication number: 20120241096Abstract: The invention has an object to provide a foreign substance removing device that is capable of quickly and efficiently cleaning substrate surfaces regardless of the size thereof and preventing readhesion of once removed foreign substances as well as to provide a die bonder equipped with the same. The foreign substance removing device of the invention includes: a pickup device to which a dicing film carrying dies thereon is fixed; and a collet for picking up a die separated from the dicing film and placing the die on a substrate having an adhesive applied thereon, and operates to remove foreign substances on the substrate in preparation for application of the adhesive onto the substrate. The foreign substance removing device includes a cleaning nozzle integrating an air outlet orifice and an air inlet orifice.Type: ApplicationFiled: September 2, 2011Publication date: September 27, 2012Applicant: Hitachi High-Tech Instruments Co., Ltd.Inventors: Takashi YAMAGAMI, Ryuichi Takano, Hiroshi Maki, Masayuki Mochizuki
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Publication number: 20100055878Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: ApplicationFiled: November 13, 2009Publication date: March 4, 2010Inventors: Hiroshi MAKI, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Patent number: 7629231Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: GrantFiled: April 16, 2007Date of Patent: December 8, 2009Assignee: Renesas Technology Corp.Inventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Publication number: 20070275544Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: ApplicationFiled: April 16, 2007Publication date: November 29, 2007Inventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Patent number: 6067062Abstract: A light valve has a composite substrate comprised of an electrically insulating substrate and a semiconductor single crystal thin film formed over the electrically insulating substrate. A pixel array comprising semiconductor switch elements is formed in the semiconductor single crystal thin film. A peripheral circuit having circuit elements is formed in the semiconductor single crystal thin film so that a small-sized, high speed light valve is obtained. X- driver and Y-driver circuits are formed in the semiconductor single crystal thin film and controlled by a control circuit, such as a video signal processing circuit, which receives and processes video signals inputted directly from an external source. The peripheral circuit can be a DRAM sense amplifier for sensing charges stored in each pixel of the pixel array to detect defects in the pixel array.Type: GrantFiled: August 23, 1991Date of Patent: May 23, 2000Assignee: Seiko Instruments Inc.Inventors: Hiroaki Takasu, Yoshikazu Kojima, Masaaki Kamiya, Tsuneo Yamazaki, Hiroshi Suzuki, Masaaki Taguchi, Ryuichi Takano, Satoru Yabe
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Patent number: 5646432Abstract: A semiconductor substrate is provided which has a semiconductor on insulator structure but in which can be formed a thin film integrated circuit having electrical characteristics and microstructure equal to or of greater density than a silicon integrated circuit formed using a bulk single crystal silicon wafer. The semiconductor substrate has a structure which is formed of a sequentially layered single crystal silicon thin film sandwiched between a thermally oxidized silicon film and a silicon oxide or silicon nitride film, an element smoothing layer, a fluoro-epoxy series resin adhesive layer, and a supporting substrate. The single crystal silicon thin film can have integrated circuit devices formed in a sub-micron geometry similar to that of a bulk single crystal silicon. A transparent glass or a bulk single crystal silicon wafer can be used as a supporting substrate.Type: GrantFiled: May 5, 1993Date of Patent: July 8, 1997Assignee: Seiko Instruments Inc.Inventors: Tadao Iwaki, Tsuneo Yamazaki, Katsuki Matsushita, Shigeru Senbonmatsu, Ryuichi Takano
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Patent number: 5637187Abstract: A process for forming a light valve device comprises forming a semiconductor single crystal film to form a composite substrate by polishing a semiconductor single crystal substrate after an electric insulating substrate has been bonded thereto; forming a group of pixel electrodes for defining a pixel region and a group of switch elements for selectively energizing the pixel electrodes by integrating a pixel array portion over the composite substrate; forming a liquid crystal aligning means for the pixel region; superposing an opposed substrate over the composite substrate with a gap therebetween; and filling the gap with liquid crystal material.Type: GrantFiled: June 5, 1995Date of Patent: June 10, 1997Assignee: Seiko Instruments Inc.Inventors: Hiroaki Takasu, Yoshikazu Kojima, Masaaki Kamiya, Tsuneo Yamazaki, Hiroshi Suzuki, Masaaki Taguchi, Ryuichi Takano, Satoru Yabe
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Patent number: 5459335Abstract: A thin film semiconductor substrate for a display device includes a thin film semiconductor circuit layer formed on a single crystal semiconductor substrate and a support substrate formed over the thin film semiconductor circuit layer. An adhesive layer made of a fluorine-containing epoxy family adhesive is provided between the insulating layer and the support substrate. When the single crystal semiconductor substrate is removed, the yield rate in production of the thin film semiconductor substrate is greatly improved.Type: GrantFiled: August 13, 1993Date of Patent: October 17, 1995Assignee: Seiko Instruments Inc.Inventors: Katsuki Matsushita, Shigeru Senbonmatsu, Tsuneo Yamazaki, Tadao Iwaki, Ryuichi Takano