Abstract: Provided is a GaAs wafer that can suitably be used to produce LiDAR sensors in particular and a method of producing a GaAs ingot that can be used to obtain such a GaAs wafer. The GaAs wafer has a silicon concentration of 5.0×1017 cm?3 or more and less than 3.5×1018 cm?3, an indium concentration of 3.0×1017 cm?3 or more and less than 3.0×1019 cm?3, and a boron concentration of 1.0×1018 cm?3 or more. The average dislocation density of the GaAs wafer is 1500/cm2 or less.

Abstract: Provided is a GaAs ingot with which a GaAs wafer having a carrier concentration of 5.5×1017 cm?3 or less and low dislocation density with an average dislocation density of 500/cm2 or less can be obtained by adding a small amount of In with Si. A seed side end and a center portion of a straight body part of the GaAs ingot each have a silicon concentration of 2.0×1017 cm?3 or more and less than 1.5×1018 cm?3, an indium concentration of 1.0×1017cm?3 or more and less than 6.5×1018 cm?3, a carrier concentration of 5.5×1017 cm?3 or less, and an average dislocation density of 500/cm2 or less.

Abstract: Provided is an ultraviolet light receiving device having photosensitivity effective to target wavelengths in the ultraviolet region. A Schottky junction ultraviolet light receiving device has the photosensitivity peak wavelength in an ultraviolet region of 230 nm or more and 320 nm or less, and exhibits a rejection ratio of 105 or more, the rejection ratio being the ratio of the responsivity Rp to the peak photosensitivity wavelength to the average of the responsivity Rv to a visible region of 400 nm or more and 680 nm or less (Rp/Rv).

Abstract: Provided is a high quality III nitride semiconductor device in which, not only X-shaped cracks extending from the vicinity of the corners of semiconductor structures to the center portion thereof, but also crack spots at the center portion can be prevented from being formed and can provide a method of efficiently manufacturing the III nitride semiconductor device. The III nitride semiconductor device of the present invention includes a support and two semiconductor structures having a nearly quadrangular transverse cross-sectional shape that are provided on the support. The two semiconductor structures are situated such that one side surface of one of the two semiconductor structures is placed to face one side surface of the other of them. The support covers the other three side surfaces and of the four sides of the semiconductor structures.

Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.

Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.

Abstract: Provided is a high quality III nitride semiconductor device in which, not only X-shaped cracks extending from the vicinity of the corners of semiconductor structures to the center portion thereof, but also crack spots at the center portion can be prevented from being formed and can provide a method of efficiently manufacturing the III nitride semiconductor device. The III nitride semiconductor device of the present invention includes a support and two semiconductor structures having a nearly quadrangular transverse cross-sectional shape that are provided on the support. The two semiconductor structures are situated such that one side surface of one of the two semiconductor structures is placed to face one side surface of the other of them. The support covers the other three side surfaces and of the four sides of the semiconductor structures.

Abstract: Provided is a III nitride semiconductor device higher heat dissipation performance, and a method of manufacturing a III nitride semiconductor device which makes it possible to fabricate such a III nitride semiconductor device at higher yield. In a method of a III nitride semiconductor device, a semiconductor structure obtained by sequentially stacking an n-layer, an active layer, and a p-layer is formed on a growth substrate; a support body including a first support electrically connected to an n-layer to serve as an n-side electrode, a second support electrically connected to a p-layer to serve as a p-side electrode, and structures made of an insulator for insulation between first and second supports is formed on the p-layer side of the semiconductor structure; and the growth substrate is separated using a lift-off process. The first support and the second support are grown by plating.

Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.

Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.

Abstract: The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).

Abstract: A method of manufacturing, at a reduced cost, a semiconductor device assembly and a semiconductor device, having a conductive support which is not eroded by an etchant for a lift-off layer even when the lift-off layer is made of a material for which no suitable selective etching solution has been found is provided. In the method of manufacturing the semiconductor device assembly, a plating step of forming a conductive support is carried out such that a first metal which is dissolved with an etchant is encapsulated in second metal which are not dissolved with the etchant, and through-holes for supplying etchant are formed in the second metal.

Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with AlxGa1-xN having a high Al composition, the growth temperature of which is high; a Group III nitride semiconductor growth substrate used for producing these, and a method for efficiently producing those. The present invention provides a Group III nitride semiconductor growth substrate comprising a crystal growth substrate including a surface portion composed of a Group III nitride semiconductor which contains at least Al, and a scandium nitride film formed on the surface portion are provided.

Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.

Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.

Abstract: There is provided a light-emitting element chip which can be safely assembled and a manufacturing method therefor. A light-emitting element chip 10 has a semiconductor layer 12 including a luminescent layer 12a on a supporting portion 11. The supporting portion 11 has a concave shape, providing a support substrate in this light-emitting element chip 10, and being connected to one electrode on the semiconductor layer 12. The outer peripheral portion of the supporting portion 11 (a supporting portion outer peripheral portion 11a) surrounds the semiconductor layer 12, and is protruded to be set at a level higher than the other face 12d and the n-side electrode 15 of the semiconductor layer 12.

Abstract: An object of the present invention is to address the problems described herein and to provide a III-nitride semiconductor epitaxial substrate, a III-nitride semiconductor element, and a III-nitride semiconductor freestanding substrate, which have good crystallinity, not only with AlGaN, GaN, or GaInN, the growth temperature of which is at or below 1050° C., but also with AlxGa1-xN, the growth temperature of which is high and which has a high Al composition, as well as a III-nitride semiconductor growth substrate for fabricating these and a method for efficiently fabricating these. The invention is characterized by being equipped with: a crystal growth substrate, at least the surface portion of which substrate includes a III-nitride semiconductor containing Al; and a single metallic layer formed on the surface portion, the single metallic layer being made from Zr or Hf.