Patents by Inventor Ryuichi Yanagisawa

Ryuichi Yanagisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5691631
    Abstract: The apparatus of the present invention has an interface circuit which returns power in H-level output state, a first power circuit supplying a first supply voltage, and a second power circuit supplying a second supply voltage. The second power circuit receives the entered first supply voltage from the first power circuit, and in a first operation mode (L-level output condition), brings the first supply voltage of 3.3 V down to the second supply voltage of 1.5 V and supplies same to the interface circuit. In a second operation mode (H-level output condition) of the load circuit, a current output from the load circuit is brought up to the first supply voltage of 3.3 V and feeds same back to the first power circuit.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: November 25, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Shimamori, Ryuichi Yanagisawa, Shinichi Ohtsu