Abstract: A multilayer composite including a core made of a magnetic ceramic sintered compact disposed therein, and shrinkage restraining layers including an inorganic powder that is not substantially sintered at the sintering temperature of the green ceramic layers are sintered in order to reduce the difference in shrinkage behavior during firing between the core and the green ceramic layers.

Abstract: A ceramic substrate includes a glass layer partially overlaying a conductor, and the glass layer has satisfactory adhesion to the main body of the ceramic substrate and having satisfactory plating resistance. The glass layer is arranged to extend from a portion of the conductor formed on a first main surface of the main body of the ceramic substrate to the first main surface of the main body of the ceramic substrate and which has a double-layered structure including a first glass sublayer composed of a first glass material, and a second glass sublayer formed on the first glass sublayer and composed of a second glass material that is different from the second glass material defining the first glass sublayer, the first glass material having more satisfactory adhesion to the main body of the ceramic substrate than the second glass material, and the first glass material having more satisfactory plating resistance than the first glass material.

Abstract: A chip-type electronic component built-in multilayer board includes a multilayer board including two or more layered dielectric layers and an inner conductor pattern, and a chip-type electronic component which is provided at the interface of the upper and lower dielectric layers and includes an external terminal electrode. The external terminal electrode is connected to an in-plane conductor provided at a interface via a first connection conductor extending along the chip-type electronic component in the lower direction from the interface of the upper and lower dielectric layers, and a second connection conductor extending along the chip-type electronic component in the upper direction from the interface of the upper and lower dielectric layers.

Abstract: A ceramic substrate includes a glass layer partially overlaying a conductor, and the glass layer has satisfactory adhesion to the main body of the ceramic substrate and having satisfactory plating resistance. The glass layer is arranged to extend from a portion of the conductor formed on a first main surface of the main body of the ceramic substrate to the first main surface of the main body of the ceramic substrate and which has a double-layered structure including a first glass sublayer composed of a first glass material, and a second glass sublayer formed on the first glass sublayer and composed of a second glass material that is different from the second glass material defining the first glass sublayer, the first glass material having more satisfactory adhesion to the main body of the ceramic substrate than the second glass material, and the first glass material having more satisfactory plating resistance than the first glass material.

Abstract: A multilayer composite including a core made of a magnetic ceramic sintered compact disposed therein, and shrinkage restraining layers including an inorganic powder that is not substantially sintered at the sintering temperature of the green ceramic layers are sintered in order to reduce the difference in shrinkage behavior during firing between the core and the green ceramic layers.

Abstract: A chip-type electronic component built-in multilayer board includes a multilayer board including two or more layered dielectric layers and an inner conductor pattern, and a chip-type electronic component which is provided at the interface of the upper and lower dielectric layers and includes an external terminal electrode. The external terminal electrode is connected to an in-plane conductor provided at a interface via a first connection conductor extending along the chip-type electronic component in the lower direction from the interface of the upper and lower dielectric layers, and a second connection conductor extending along the chip-type electronic component in the upper direction from the interface of the upper and lower dielectric layers.