Abstract: A sensor includes: a silicon substrate having a hollow portion, which is arranged on a backside of the substrate; an insulation film disposed on a front side of the substrate and covering the hollow portion; a heater disposed on the insulation film, made of a semiconductor layer, and configured to generate heat; and an anti-stripping film for protecting the insulation film from being removed from the silicon substrate. The silicon substrate, the insulation film and the semiconductor layer provide a SOI substrate. The hollow portion has a sidewall and a bottom. The anti-stripping film covers at least a boundary between the sidewall and the bottom of the hollow portion.

Abstract: A sensor includes: a silicon substrate having a hollow portion, which is arranged on a backside of the substrate; an insulation film disposed on a front side of the substrate and covering the hollow portion; a heater disposed on the insulation film, made of a semiconductor layer, and configured to generate heat; and an anti-stripping film for protecting the insulation film from being removed from the silicon substrate. The silicon substrate, the insulation film and the. semiconductor layer provide a SOI substrate. The hollow portion has a sidewall and a bottom. The anti-stripping film covers at least a boundary between the sidewall and the bottom of the hollow portion.

Abstract: An island region surrounded by a trench is provided in an SOI substrate. The island region is further surrounded by a buffer region with a buffer region contact layer. In the island region, a source region is annularly provided around a drain region, and source and drain electrodes are respectively provided on the source and the drain regions. An annular auxiliary electrode is formed with the source electrode to extend over the trench. Accordingly, a voltage applied to the source electrode can be applied to the auxiliary electrode, so that electric field concentration between the buffer region and the source electrode is relaxed.

Abstract: A differential amplifier circuit whose noise is reduced when used in a CMOS operational amplifier without increasing its cost includes a differential input stage circuit in which gate lengths of load transistors and gate lengths of differential input transistors are set to an optimal ratio to minimize internal transistor noise components.