Abstract: An interface circuit includes: a transmission and reception circuit being a circuit configured to transmit and receive serial data, the transmission and reception circuit having a plurality of internal states, the transmission and reception circuit configured to operate by performing a state transition between a plurality of the internal states; a control circuit configured to output, in time-series order, an internal state signal that indicates a current internal state among the plurality of internal states; and a monitor circuit including a storage circuit having a plurality of storage areas for holding the internal state signals output in time-series order, the monitor circuit configured to monitor an internal state of the transmission and reception circuit, in which the monitor circuit is configured to sequentially receive the internal state signal from the control circuit and write the received internal state signal to the plurality of storage areas in time-series order.

Abstract: A buffer circuit includes: a register array including registers in a plurality of stages; and a control circuit configured to rearrange a plurality of pieces of received data in the register in a determined transfer order and to control the register array to sequentially output the plurality of pieces of received data as one piece of transfer data when all the received data is stored, wherein the control circuit controls the register array to store stored data in each register in a preceding stage when the register array outputs the received data, and the control circuit determines a write register in accordance with the transfer order when the register array newly stores the received data and controls the register array to store data stored in the write register in a following stage of the write register and to store the new received data in the write register.

Abstract: A buffer circuit includes: a register array including registers in a plurality of stages; and a control circuit configured to rearrange a plurality of pieces of received data in the register in a determined transfer order and to control the register array to sequentially output the plurality of pieces of received data as one piece of transfer data when all the received data is stored, wherein the control circuit controls the register array to store stored data in each register in a preceding stage when the register array outputs the received data, and the control circuit determines a write register in accordance with the transfer order when the register array newly stores the received data and controls the register array to store data stored in the write register in a following stage of the write register and to store the new received data in the write register.

Abstract: A data buffer device includes: a tag value generation circuit that generates a tag value; a first buffer that stores first priority data; a second buffer that stores second priority data; and a data output circuit that outputs the first priority data or the second priority data, wherein the tag value generation circuit sets a tag value for the following second input data to a second tag value which differs from a first tag value for second preceding input data, and sets a tag value of the following first input data to a fourth tag value that is the same as a third tag value for the first preceding input data, and wherein the data output circuit outputs the first priority data or the second priority data in a first mode based on the tag values and outputs the first priority data earlier in a second mode.

Abstract: A data buffer device includes: a tag value generation circuit that generates a tag value; a first buffer that stores first priority data; a second buffer that stores second priority data; and a data output circuit that outputs the first priority data or the second priority data, wherein the tag value generation circuit sets a tag value for the following second input data to a second tag value which differs from a first tag value for second preceding input data, and sets a tag value of the following first input data to a fourth tag value that is the same as a third tag value for the first preceding input data, and wherein the data output circuit outputs the first priority data or the second priority data in a first mode based on the tag values and outputs the first priority data earlier in a second mode.

Abstract: A highly reliable detoxifying method of the cyano matters is provided. The waste-liquor, which contains at least one of free cyano material, a cyano complex and a reducing compound exhibiting volatility in alkaline aqueous solution, is heated under an alkaline condition to a temperature range, which lies within a range of from room temperature to the boiling point, and which includes a high temperature range of 80° C. or more, followed by holding the temperature; oxidation-reduction potential of the waste liquor is measured from the room temperature; and, hypochlorite is intermittently or continuously added to the waste liquor from the room temperature, until the oxidation-reduction of the hypochlorite is detected.

Abstract: A highly reliable detoxifying method of the cyano matters is provided. The waste-liquor (1), which contains at least one of free cyano matters, a cyano complex and a reducing compound exhibiting volatility in alkaline aqueous solution, is heated under an alkaline condition to a temperature range, which lies within a range of from room temperature to boiling point, and which includes a high temperature range of 80° C. or more, followed by holding the temperature (7); oxidation-reduction potential of the waste liquor is measured from the room temperature; and, hypochlorite (2) is intermittently or continuously added to the waste liquor from the room temperature, until the oxidation-reduction of the the hypochlorite is detected.

Abstract: This invention concerns a humidity sensor wherein a chemical conversion coating, giving attention to the property that it undergoes an impedance decrease with adsorption of moisture, is used as humidity sensing element which is characterizied by an extremely short electrode distance, greatly improved sensitivity, high speed response, stable performance over a long period of time, high reliability and cheaper production cost.The principal point that characterizes the humidity sensor in this invention is that the chemical conversion coating deposited on the metal surface with or without an electrolysis application, is made usable as a humidity sensing element. For the chemical conversion coating, such coatings as phosphate, oxalate, titanium fluoro-complex, chromium phosphate and non-chromium types are used.On top of this chemical conversion coating, application of a humidity sensing film is effected to further improve humidity sensing performance.

Abstract: A method for determining the coating weight and composition of a zinc phosphate coating on a ferrous metal surface comprises stripping the coating from a known area using an aqueous solution of sodium hydroxide and triethanolamine, thereafter measuring the iron and phosphate contents by colorimetric analysis of the stripping solution and then determining the coating weight and composition based on such measurements.