Patents by Inventor Ryuji MASUYAMA

Ryuji MASUYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10514516
    Abstract: A functional optical device applicable to a coherent optical communication system as a front end device is disclosed. The functional optical device includes a pair of light-receiving elements of a type of waveguide photodiode (PD), a pair of signal pads, a pair of ground pads, a bias pad, and a substrate that monolithically integrates those elements thereon. The light-receiving elements generate a photocurrent complementary to each other in respective anodes thereof; while, receive biases through the bias pad common to the light-receiving elements. Those pads are disposed along an edge of the substrate such that the signal pads put the bias pads therebetween, and the ground pads put the signal pads and the bias pad therebetween.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 24, 2019
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Takuya Okimoto
  • Publication number: 20180252881
    Abstract: A functional optical device applicable to a coherent optical communication system as a front end device is disclosed. The functional optical device includes a pair of light-receiving elements of a type of waveguide photodiode (PD), a pair of signal pads, a pair of ground pads, a bias pad, and a substrate that monolithically integrates those elements thereon. The light-receiving elements generate a photocurrent complementary to each other in respective anodes thereof; while, receive biases through the bias pad common to the light-receiving elements. Those pads are disposed along an edge of the substrate such that the signal pads put the bias pads therebetween, and the ground pads put the signal pads and the bias pad therebetween.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 6, 2018
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Takuya Okimoto
  • Patent number: 9893100
    Abstract: A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: February 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Hideki Yagi, Naoko Konishi
  • Patent number: 9696496
    Abstract: A semiconductor optical device includes a semiconductor substrate having first to fourth regions, a 90-degree optical hybrid provided in the third region on a principal surface of the semiconductor substrate, first and second waveguides provided in the first region and being optically coupled to the 90-degree optical hybrid, a photodiode provided in the fourth region, a third waveguide provided in the second region to optically couple the 90-degree optical hybrid to the photodiode, and a metal layer provided on a back surface of the semiconductor substrate. The metal layer includes a first part provided in the first region and a second part provided in the second region that is spaced apart from the first part by a distance. The 90-degree optical hybrid has a first length. The distance between the first and second parts is more than or equal to the first length.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: July 4, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Kenji Sakurai, Takehiko Kikuchi
  • Publication number: 20170131473
    Abstract: A semiconductor optical device includes a semiconductor substrate having first to fourth regions, a 90-degree optical hybrid provided in the third region on a principal surface of the semiconductor substrate, first and second waveguides provided in the first region being optically coupled to the 90-degree optical hybrid, a photodiode provided in the fourth region, a third waveguide provided in the second region to optically couple the 90-degree optical hybrid to the photodiode, and a metal layer provided on a back surface of the semiconductor substrate. The metal layer includes a first part provided in the first region and a second part provided in the second region spaced apart from the first region by a distance. The 90-degree optical hybrid has a first length. The distance between the first and second parts is more than or equal to the first length.
    Type: Application
    Filed: November 2, 2016
    Publication date: May 11, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji MASUYAMA, Yoshihiro YONEDA, Hideki YAGI, Kenji SAKURAI, Takehiko KIKUCHI
  • Patent number: 9563100
    Abstract: An optical semiconductor device including: a substrate having a principal surface; first and second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; first and second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: February 7, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Naoya Kono, Daisuke Kimura, Hirohiko Kobayashi, Takamitsu Kitamura, Hideki Yagi
  • Publication number: 20160380023
    Abstract: A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
    Type: Application
    Filed: June 27, 2016
    Publication date: December 29, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Ryuji MASUYAMA, Hideki YAGI, Naoko KONISHI
  • Patent number: 9366835
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving devices include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 14, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20160026064
    Abstract: An optical semiconductor device including: a substrate having a principal surface; a first and a second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; a first and a second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji MASUYAMA, Naoya KONO, Daisuke KIMURA, Hirohiko KOBAYASHI, Takamitsu KITAMURA, Hideki YAGI
  • Publication number: 20150260933
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving device include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9123539
    Abstract: A method for manufacturing an optical semiconductor device includes a step of forming a stacked semiconductor layer on a substrate, the stacked semiconductor layer including a plurality of semiconductor layers; a step of forming a mask on a top layer of the stacked semiconductor layer, the mask covering a portion of the top layer; an exposing step of exposing the top layer of the stacked semiconductor layer to an oxygen-containing atmosphere; after the exposing step, a heating step of heating the stacked semiconductor layer to a temperature of 250° C. or more; and after the heating step, a step of forming a semiconductor mesa in the stacked semiconductor layer, the semiconductor mesa being formed by etching the stacked semiconductor layer by a dry etching method using the mask. The top layer of the plurality of semiconductor layers of the stacked semiconductor layer contains arsenic.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: September 1, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ryuji Masuyama
  • Patent number: 9103976
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: August 11, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9023677
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: May 5, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naoko Konishi, Hideki Yagi, Ryuji Masuyama, Yoshihiro Yoneda
  • Patent number: 8969989
    Abstract: An optical-to-electrical converter unit includes a substrate having front and back surfaces; an original waveguide unit; and an optical-to-electrical converter. The optical-to-electrical converter includes a light-receiving element optically coupled to the optical waveguide unit; a capacitance element including first and second conductive layers and an insulating layer disposed between the first and second conductive layers; an electrode pad electrically connected to the light-receiving element; a back electrode formed on the back surface of the substrate; and a via electrode extending from the front surface to the back surface of the substrate. The optical waveguide unit, the light-receiving element, the capacitance element, and the electrode pad are formed on the front surface. The first conductive layer of the capacitance element is electrically connected to the light-receiving element and the electrode pad.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: March 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Hideki Yagi, Naoko Inoue
  • Patent number: 8946842
    Abstract: A method for manufacturing an optical waveguide receiver includes the steps of growing first and second stacked semiconductor layer sections, the second stacked semiconductor layer section including a core layer and a cladding layer; forming a first mask including first and second portions; etching the first and second stacked semiconductor layer sections by using the first mask, the first and second stacked semiconductor layer sections covered with the first portion being etched in a mesa structure, the second stacked semiconductor layer section covered with the second portion being etched in a terrace-shaped structure; removing the second portion from the first mask with the first portion left; selectively etching the cladding layer until exposing a surface of the core layer; and sequentially forming a first metal layer, an insulating film, and a second metal layer on the core layer exposed in the step of selectively etching the cladding layer.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: February 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Inoue
  • Patent number: 8900903
    Abstract: A method for producing an optical semiconductor device includes the steps of forming a semiconductor structure; forming a mask on the semiconductor structure; etching the semiconductor structure with the mask to form first and second stripe-shaped grooves and a mesa portion; forming a protective film on a top surface and side surfaces of the mesa portion; forming a resin portion on the protective film; etching the resin portion and the protective film formed on the top surface; forming an upper electrode on the top surface; and forming an electrical interconnection on the resin portion. The resin portion has an inclined surface region that rises from a first point above the mesa portion toward a second point above the first stripe-shaped groove. The step of etching the resin portion and the protective film includes the substeps of etching the resin portion and simultaneously etching the resin portion and the protective film.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: December 2, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Ryuji Masuyama
  • Publication number: 20140342491
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 20, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20140335644
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoko INOUE, Hideki YAGI, Ryuji MASUYAMA, Yoshihiro YONEDA
  • Patent number: 8873598
    Abstract: A waveguide-type optical semiconductor device includes a substrate with a main surface; a structure including a stacked semiconductor layer including a core layer provided on the main surface of the substrate, a stripe-shaped mesa portion protruding in a first direction orthogonal to the main surface and extending in a second direction parallel to the main surface, and a pair of stripe-shaped grooves defining the stripe-shaped mesa portion and extending in the second direction; a protrusion provided in the pair of stripe-shaped grooves, the protrusion protruding from the structure in the first direction; and a resin portion covering a side face of the protrusion, the resin portion being buried in the stripe-shaped grooves. The relative position of the protrusion with respect to the structure is fixed. In addition, the side face of the protrusion intersects with the second direction when viewed from the first direction.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: October 28, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Ryuji Masuyama
  • Publication number: 20140246746
    Abstract: An optical-to-electrical converter unit includes a substrate having front and back surfaces; an optical waveguide unit; and an optical-to-electrical converter. The optical-to-electrical converter includes a light-receiving element optically coupled to the optical waveguide unit; a capacitance element including first and second conductive layers and an insulating layer disposed between the first and second conducive layers; an electrode pad electrically connected to the light-receiving element; a back electrode formed on the back surface of the substrate; and a via electrode extending from the front surface to the back surface of the substrate. The optical waveguide unit, the light-receiving element, the capacitance element, and the electrode pad are formed on the front surface. The first conductive layer of the capacitance element is electrically connected to the light-receiving element and the electrode pad.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 4, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro YONEDA, Ryuji MASUYAMA, Hideki YAGI, Naoko INOUE