Abstract: Disclosed is a semiconductor device including first and second semiconductor elements, first and second external connection terminals and a sealing member. The first external connection terminal is provided at a first surface of the first semiconductor element. The second semiconductor element is provided at a second surface side, that is at a side opposite to the first surface, of the first semiconductor element. The second external connection terminal is connected to the second semiconductor element, and the second external connection terminal is configured to be, together with the first external connection terminal, connected to a wiring board. The sealing member seals the first and second semiconductor elements and exposes a portion, that is configured to be connected to the wiring board, of the first external connection terminal and a portion, that is configured to be connected to the wiring board, of the second external connection terminal.

Abstract: Disclosed is a semiconductor device including first and second semiconductor elements, first and second external connection terminals and a sealing member. The first external connection terminal is provided at a first surface of the first semiconductor element. The second semiconductor element is provided at a second surface side, that is at a side opposite to the first surface, of the first semiconductor element. The second external connection terminal is connected to the second semiconductor element, and the second external connection terminal is configured to be, together with the first external connection terminal, connected to a wiring board. The sealing member seals the first and second semiconductor elements and exposes a portion, that is configured to be connected to the wiring board, of the first external connection terminal and a portion, that is configured to be connected to the wiring board, of the second external connection terminal.

Abstract: A semiconductor device, including a semiconductor substrate where a plurality of functional elements is formed; and a multilayer interconnection layer provided over the semiconductor substrate, the multilayer interconnection layer including a wiring layer mutually connecting the plural functional elements and including an interlayer insulation layer, wherein a region where the wiring layer is formed is surrounded by a groove forming part, the groove forming part piercing the multilayer interconnection layer; and the groove forming part is filled with an organic insulation material.

Abstract: A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the column electrode is provided with a second end, opposite to the first end, projecting from the encapsulation resin, and an external connection member is connected to the column electrode at the second end so that the external connection member is separate from a surface of the encapsulation resin.

Abstract: A semiconductor device includes: a semiconductor chip; a plurality of pellet-like electrically conductive members connected to electrodes of the semiconductor chip; and an encapsulation resin that encapsulates the semiconductor chip and the electrically conductive members. The electrically conductive members are embedded into the encapsulation resin. Surfaces of the electrically conductive members are exposed from the encapsulation resin so that the electrically conductive members serve as external connection terminals of the semiconductor device.

Abstract: A semiconductor device, including a semiconductor substrate where a plurality of functional elements is formed; and a multilayer interconnection layer provided over the semiconductor substrate, the multilayer interconnection layer including a wiring layer mutually connecting the plural functional elements and including an interlayer insulation layer, wherein a region where the wiring layer is formed is surrounded by a groove forming part, the groove forming part piercing the multilayer interconnection layer; and the groove forming part is filled with an organic insulation material.

Abstract: A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the column electrode is provided with a second end, opposite to the first end, projecting from the encapsulation resin, and an external connection member is connected to the column electrode at the second end so that the external connection member is separate from a surface of the encapsulation resin.

Abstract: A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract: A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the column electrode is provided with a second end, opposite to the first end, projecting from the encapsulation resin, and an external connection member is connected to the column electrode at the second end so that the external connection member is separate from a surface of the encapsulation resin.

Abstract: A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Abstract: A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the column electrode is provided with a second end, opposite to the first end, projecting from the encapsulation resin, and an external connection member is connected to the column electrode at the second end so that the external connection member is separate from a surface of the encapsulation resin.

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.

Abstract: A device includes a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic films.

Abstract: A wire bonding method includes a first bonding process for forming a first ball-shaped part in a wire and bonding the first ball-shaped part to a first connected member; a ball-shaped part forming process for guiding the wire away from a position where the wire is bonded to an inner lead so as to form a predetermined loop, and a second bonding process for forming a second ball-shaped part in a predetermined position in the wire; and a second bonding process for bonding the second ball-shaped part to a semiconductor element pad that serves as a second connected member.

Abstract: A semiconductor device including a semiconductor chip sealed with an encapsulating resin. Columnar electrodes are connected to electrode pads of the semiconductor chip, and extend through the encapsulating resin. The columnar electrodes are made from bonding wires and include enlarged outer ends. Solder balls are arranged on the surface of the encapsulating resin and connected to the outer ends of the columnar electrodes. In another example, pin wires are formed by half-cutting bonding wires, bonding one end of each of the bonding wires, and cutting the bonding wires at the half-cut portions.

Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts.

Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.