Patents by Inventor Ryuji Norimoto

Ryuji Norimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11114342
    Abstract: A wafer processing method is a method of dividing a wafer in which a functional layer is laminated to a top surface of a substrate and a plurality of devices are formed, along streets dividing the plurality of devices. The wafer processing method includes: a protective member disposing step of disposing an adhesive tape on the functional layer side of a top surface of the wafer; a cutting step of forming, along the streets, a cut groove having a depth exceeding a finished thickness of the wafer by making a cutting blade cut into an undersurface of the wafer; and a plasma etching step of extending the cut groove toward the top surface of the wafer and dividing the substrate along the streets by plasma-etching, from an undersurface side, the wafer whose adhesive tape side is held by a chuck table.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: September 7, 2021
    Assignee: DISCO CORPORATION
    Inventor: Ryuji Norimoto
  • Patent number: 10629487
    Abstract: Disclosed herein is a wafer dividing method including a shield film forming step of applying a liquid resin to the back side of a wafer having a plurality of devices on the front side, thereby forming a shield film from the liquid resin, the liquid resin containing a laser absorbing agent for absorbing a laser beam, a shield film removing step of applying the laser beam along each division line to the shield film formed on the back side of the wafer, thereby performing ablation to remove the shield film along each division line, and a dividing step of plasma-etching the wafer from the back side thereof after performing the shield film removing step, thereby partially removing the wafer in an area corresponding to each division line to thereby divide the wafer into a plurality of device chips.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: April 21, 2020
    Assignee: DISCO CORPORATION
    Inventor: Ryuji Norimoto
  • Publication number: 20190122928
    Abstract: A wafer processing method is a method of dividing a wafer in which a functional layer is laminated to a top surface of a substrate and a plurality of devices are formed, along streets dividing the plurality of devices. The wafer processing method includes: a protective member disposing step of disposing an adhesive tape on the functional layer side of a top surface of the wafer; a cutting step of forming, along the streets, a cut groove having a depth exceeding a finished thickness of the wafer by making a cutting blade cut into an undersurface of the wafer; and a plasma etching step of extending the cut groove toward the top surface of the wafer and dividing the substrate along the streets by plasma-etching, from an undersurface side, the wafer whose adhesive tape side is held by a chuck table.
    Type: Application
    Filed: October 22, 2018
    Publication date: April 25, 2019
    Inventor: Ryuji NORIMOTO
  • Publication number: 20180114696
    Abstract: Disclosed herein is a wafer dividing method including a shield film forming step of applying a liquid resin to the back side of a wafer having a plurality of devices on the front side, thereby forming a shield film from the liquid resin, the liquid resin containing a laser absorbing agent for absorbing a laser beam, a shield film removing step of applying the laser beam along each division line to the shield film formed on the back side of the wafer, thereby performing ablation to remove the shield film along each division line, and a dividing step of plasma-etching the wafer from the back side thereof after performing the shield film removing step, thereby partially removing the wafer in an area corresponding to each division line to thereby divide the wafer into a plurality of device chips.
    Type: Application
    Filed: October 23, 2017
    Publication date: April 26, 2018
    Inventor: Ryuji Norimoto
  • Patent number: 7439162
    Abstract: The present invention grinds the rear surface side of a device area to form a recessed portion and an annular reinforcement part on the outer periphery of the recessed portion, removes the annular reinforcement part by grinding or cutting the rear surface of the annular reinforcement part so as to give the wafer a uniform thickness, locates the position of streets in the front surface of the wafer by infrared imaging from the rear surface side of the wafer, and after dividing the wafer into individual devices affixes dicing tape to the rear surface of the wafer divided into devices, supports the rear surface of the wafer on a dicing frame and peels a protective member off the front surface of the wafer, thereby enabling the wafer to be supported using ordinary dicing tape while posing no obstacle to device pick-up after division of the wafer.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: October 21, 2008
    Assignee: Disco Corporation
    Inventors: Ryuji Norimoto, Tadato Nagasawa, Takatoshi Masuda
  • Publication number: 20070123002
    Abstract: The present invention grinds the rear surface side of a device area to form a recessed portion and an annular reinforcement part on the outer periphery of the recessed portion, removes the annular reinforcement part by grinding or cutting the rear surface of the annular reinforcement part so as to give the wafer a uniform thickness, locates the position of streets in the front surface of the wafer by infrared imaging from the rear surface side of the wafer, and after dividing the wafer into individual devices affixes dicing tape to the rear surface of the wafer divided into devices, supports the rear surface of the wafer on a dicing frame and peels a protective member off the front surface of the wafer, thereby enabling the wafer to be supported using ordinary dicing tape while posing no obstacle to device pick-up after division of the wafer.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 31, 2007
    Inventors: Ryuji Norimoto, Tadato Nagasawa, Takatoshi Masuda