Patents by Inventor Ryuta Arai

Ryuta Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990739
    Abstract: A wiring member with a fixing member includes a flat wiring member, and a fixing member. The fixing member includes an attachment part and a fixing part. The attachment part includes an annular part and an annular shape maintaining part. The annular part is capable of changing a state between an annular state and a non-annular state. The annular shape maintaining part is provided at one end portion of the annular part, fastens another end portion of the annular part, and maintains the annular part in the annular state. In a state in which the annular part is in the annular state and the attachment part is attached to the flat wiring member, a part of the flat wiring member to which the attachment part is attached is in a spread state.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 21, 2024
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuta Takakura, Miyu Aramaki, Daisuke Ebata, Taku Umehara, Tetsuya Nishimura, Kenta Arai
  • Patent number: 11929599
    Abstract: A wiring member with a fixing member includes a wiring member, and a fixing member. The wiring member includes a plurality of wire-like transmission members and a base material. The plurality of wire-like transmission members are fixed to the base material in an arrayed state. The base material is bent so as to surround the plurality of wire-like transmission members. The fixing member includes an attachment part and a fixing part. The attachment part is attached to the wiring member so as to be located on outside of the base material. The fixing part is a part being connected to the attachment part and being fixed to a fixing target of the wiring member. In a state in which the attachment part is attached to the wiring member, the base material is maintained in a bent state.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: March 12, 2024
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tetsuya Nishimura, Daisuke Ebata, Taku Umehara, Ryuta Takakura, Kenta Arai, Miyu Aramaki
  • Patent number: 11927923
    Abstract: A management apparatus in a time synchronization system includes a time variation information receiving unit configured to acquire time variation information and position information of a time synchronization apparatus, a position information classifying unit configured to classify time synchronization apparatuses into predetermined categories based on the acquired position information, a time variation analysis configured to determine majority based on whether patterns of time variation of the time synchronization apparatuses belonging to an identical category are identical to each other, and to analyze the time variation based on the determined results, and a filtering and delivery unit configured to output an instruction to block the time information received from the positioning satellite, to the time synchronization apparatus having abnormal time variation.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: March 12, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takaaki Hisashima, Hiroki Sakuma, Kaoru Arai, Ryuta Sugiyama, Shunichi Tsuboi, Osamu Kurokawa, Kazuyuki Matsumura
  • Patent number: 11915851
    Abstract: An inductor includes an external terminal and an element body that includes a magnetic portion containing a magnetic powder and a coil embedded in the magnetic portion. The magnetic powder has a particle size D50 at 50% of the cumulative volume of 5 ?m or less, a D90/D10 of 19 or lower, and a Vickers hardness of 1000 (kgf/mm2) or lower, the D90/D10 being the ratio of particle size D90 at 90% of the cumulative volume to particle size D10 at 10% of the cumulative volume in the cumulative particle size distribution by volume. In the magnetic portion, the packing density of the magnetic powder by volume is 60% or higher.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: February 27, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yuichi Tsuchiya, Takumi Arai, Motoki Toyama, Ryuta Uematsu
  • Patent number: 10636728
    Abstract: A semiconductor device includes field-effect transistor having a gate, a drain, and a source. A first clamping circuit is connected between the drain and the gate. The first clamping circuit has a first clamp voltage that is lower than a source-to-drain breakdown voltage of the field-effect transistor. A first resistor in the device has a first end connected to a first node between the first clamping circuit and the gate. A second clamping circuit is connected between the drain and a second end of the first resistor. The second clamping circuit has a second clamp voltage is higher than the first clamp voltage and lower than the source-to-drain breakdown voltage.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 28, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Kikuchi, Ryuta Arai
  • Patent number: 10325902
    Abstract: A semiconductor device includes a first bidirectional diode of a ring shape surrounding a central region and including a first connection section and a second connection section which is provided to the inner side of the ring shape from the first connection section, a semiconductor element in the central region including a first semiconductor element electrode, a second semiconductor element electrode, and a control electrode, the first semiconductor element electrode electrically connected to the first connection section and the second semiconductor element electrode electrically connected to the control electrode, a first resistor including a first resistor electrode and a second resistor electrode, the first resistor electrode electrically connected to the second connection section and the control electrode, a second bidirectional diode electrically connected to the second resistor electrode and to the second semiconductor element electrode, and a second resistor element electrically connected to the secon
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 18, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuta Arai, Hidetoshi Asahara, Makoto Tsuzuki
  • Publication number: 20180277467
    Abstract: A semiconductor device includes field-effect transistor having a gate, a drain, and a source. A first clamping circuit is connected between the drain and the gate. The first clamping circuit has a first clamp voltage that is lower than a source-to-drain breakdown voltage of the field-effect transistor. A first resistor in the device has a first end connected to a first node between the first clamping circuit and the gate. A second clamping circuit is connected between the drain and a second end of the first resistor. The second clamping circuit has a second clamp voltage is higher than the first clamp voltage and lower than the source-to-drain breakdown voltage.
    Type: Application
    Filed: August 31, 2017
    Publication date: September 27, 2018
    Inventors: Koji KIKUCHI, Ryuta ARAI
  • Publication number: 20170263598
    Abstract: A semiconductor device includes a first bidirectional diode of a ring shape surrounding a central region and including a first connection section and a second connection section which is provided to the inner side of the ring shape from the first connection section, a semiconductor element in the central region including a first semiconductor element electrode, a second semiconductor element electrode, and a control electrode, the first semiconductor element electrode electrically connected to the first connection section and the second semiconductor element electrode electrically connected to the control electrode, a first resistor including a first resistor electrode and a second resistor electrode, the first resistor electrode electrically connected to the second connection section and the control electrode, a second bidirectional diode electrically connected to the second resistor electrode and to the second semiconductor element electrode, and a second resistor element electrically connected to the secon
    Type: Application
    Filed: August 25, 2016
    Publication date: September 14, 2017
    Inventors: Ryuta ARAI, Hidetoshi ASAHARA, Makoto TSUZUKI
  • Publication number: 20130248996
    Abstract: According to one embodiment, in a semiconductor device, a first semiconductor layer of a first conductivity type is formed on a semiconductor substrate of the first conductivity type. A second semiconductor layer of a second conductivity type is formed on the first semiconductor layer at a central portion except an end portion of the semiconductor substrate. A plurality of belt-shaped control electrodes is formed in parallel through a first insulating film on a surface of the second semiconductor layer. A third semiconductor layer of the first conductivity type selectively is formed on a surface of the second semiconductor layer between the control electrodes. A first electrode is formed on the control electrodes through respective second insulating films and is in contact with the third semiconductor layer. A second electrode is formed on the first semiconductor layer at the end portion of the semiconductor substrate.
    Type: Application
    Filed: February 28, 2013
    Publication date: September 26, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaaki OGASAWARA, Ryuta ARAI, Shigehiro HOSOI
  • Patent number: 8183606
    Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: May 22, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Arai, Hidetoshi Asahara, Kouji Murakami, Keiko Kawamura
  • Publication number: 20100127330
    Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.
    Type: Application
    Filed: November 25, 2009
    Publication date: May 27, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuta ARAI, Hidetoshi ASAHARA, Kouji MURAKAMI, Keiko KAWAMURA