Patents by Inventor Ryuta KIMURA

Ryuta KIMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250046732
    Abstract: The present disclosure provides a method for manufacturing a semiconductor device, comprising: a first process of forming a first layer on a main surface of a wafer, wherein the first layer has a reference mark for measuring a positional deviation of a resist relative to a first element pattern for a semiconductor element; a second process of forming the resist on the first layer to cover the reference mark and the first element pattern; a third process of exposing and developing the resist to form a positional deviation determination pattern overlapping the reference mark in a plan view; a peripheral pattern surrounding the positional deviation determination pattern in the plan view; and a second element pattern for the semiconductor element; and a fourth process of determining a positional deviation of the second element pattern with respect to the first element pattern.
    Type: Application
    Filed: July 30, 2024
    Publication date: February 6, 2025
    Applicant: ROHM CO., LTD.
    Inventor: Ryuta KIMURA
  • Publication number: 20240071877
    Abstract: A semiconductor device includes a first semiconductor element, a first object, a sealing resin and a covering part. The first semiconductor element includes a first electrode. The first object includes a first surface facing the first electrode. The sealing resin covers the first semiconductor element and the first object. The covering part is interposed between the first electrode and the first surface and contains a material having a higher thermal conductivity than the sealing resin.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Yosui FUTAMURA, Shunya MIKAMI, Ryuta KIMURA, Kazuhisa KUMAGAI
  • Publication number: 20220301993
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes: a first die pad having a first main surface and a first back surface facing opposite sides to each other in a thickness direction; a second die pad arranged side by side with the first die pad in a first direction orthogonal to the thickness direction, and located on a side of the first main surface with respect to the first die pad in the thickness direction; and a connecting portion connected to the first die pad and the second die pad, and wherein the first back surface is exposed from the sealing resin.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301967
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; a sealing resin that covers the first semiconductor element; and a heat transfer member arranged on the first lead, wherein the first lead includes: a first die pad having a first main surface and a first back surface; a second die pad arranged side by side with the first die pad and located on a side of the first main surface with respect to the first die pad; and a connecting portion connected to the first and second die pads, wherein the second die pad has a second main surface facing the same side as the first main surface, and a second back surface facing the same side as the first back surface, and wherein the heat transfer member is arranged on the second back surface and is exposed from the sealing resin.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301965
    Abstract: There is provided a semiconductor device including: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion, wherein the first die pad has a first main surface and a first back surface facing opposite sides in a thickness direction, and wherein the second die pad is arranged side by side with the first die pad in a first direction orthogonal to the thickness direction, and is located on a side of the first main surface with respect to the first die pad in the thickness direction.
    Type: Application
    Filed: February 23, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301966
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes: a first die pad having a first main surface and a first back surface; a second die pad arranged side by side with the first die pad and located on a side of the first main surface with respect to the first die pad; and a connecting portion connected to the first die pad and the second die pad, wherein the second die pad has a second main surface and a second back surface, and wherein the connecting portion has a connecting portion main surface connected to the first main surface and the second main surface, and an inhibiting portion arranged on the connecting portion main surface and configured to inhibit a flow of a fluid.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA