Patents by Inventor Ryuta Okamoto

Ryuta Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210337156
    Abstract: The present disclosure relates to an imaging element, a driving method, and electronic equipment that enable imaging to be performed at higher speed. The imaging element includes a pixel array in which a plurality of pixels are arranged in a matrix shape, an AD converter that performs AD conversion in parallel on pixel signals that have been output from the plurality of pixels for each column of the plurality of pixels arranged in the pixel array, and a reference signal generator that generates a reference signal that the AD converter refers to when the AD converter performs AD conversion on a pixel signal for an identical pixel signal, the reference signal having a waveform that includes a slope having a constant gradient.
    Type: Application
    Filed: July 21, 2017
    Publication date: October 28, 2021
    Inventors: RYUTA OKAMOTO, YOSUKE UENO, YASUNORI TSUKUDA
  • Patent number: 10840936
    Abstract: Provided is an AD conversion unit that includes a comparator to compare an electric signal with a reference signal having a variable level, and performs AD conversion of the electric signal by using a result of the comparison between the electric signal and the reference signal by the comparator. An attenuation unit attenuates the electric signal supplied to the comparator with the amplitude of the electric signal.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: November 17, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masako Hasegawa, Ryuta Okamoto, Tomonori Yamashita, Atsumi Niwa, Yosuke Ueno
  • Publication number: 20190305792
    Abstract: The present technology relates to a sensor, a driving method, and an electronic device that are capable of improving the dynamic range and noise of AD conversion. An AD conversion unit includes a comparator configured to compare an electric signal with a reference signal having a variable level, and performs AD conversion of the electric signal by using a result of the comparison between the electric signal and the reference signal by the comparator. An attenuation unit attenuates the electric signal supplied to the comparator in accordance with the amplitude of the electric signal. The present technology is applicable to, for example, a case where AD conversion is performed on an electric signal.
    Type: Application
    Filed: July 14, 2017
    Publication date: October 3, 2019
    Inventors: MASAKO HASEGAWA, RYUTA OKAMOTO, TOMONORI YAMASHITA, ATSUMI NIWA, YOSUKE UENO
  • Publication number: 20150264288
    Abstract: According to one embodiment, a pixel array unit has pixels for accumulating photoelectric-converted charges arranged in a matrix, and a drive voltage generation circuit that generates a drive voltage for driving the pixels on driving of the pixels and increases a drive force for generating the drive voltage according to a timing of start of the driving.
    Type: Application
    Filed: August 27, 2014
    Publication date: September 17, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryuta OKAMOTO
  • Publication number: 20140374571
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel array unit having pixels in a matrix form to store charge obtained by photoelectric conversion; a reference voltage generation circuit configured to generate a reference voltage based on an inter-terminal voltage of a first capacitor; and a column ADC circuit configured to calculate an AD conversion value of a pixel signal read out from each of the pixels on the basis of a result of comparison between the pixel signal and the reference voltage, the first capacitor comprising: a first nonlinear capacitance; and a second nonlinear capacitance connected in parallel with the first nonlinear capacitance to have a polarity opposite to that of the first nonlinear capacitance.
    Type: Application
    Filed: December 16, 2013
    Publication date: December 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryuta Okamoto
  • Publication number: 20140252207
    Abstract: An ADC includes a comparator and first and second amplifier circuits including a fully-differential operational amplifier. The comparator converts an analog signal output from the operational amplifier into digital data. The first amplifier circuit stores charge corresponding to a signal having a phase reverse to an input signal in each of a pair of capacitors during a first period and transfers the charge in one of the pair of capacitors to the other via the operational amplifier during a second period to amplify the reversed phase signal twofold. The second amplifier circuit amplifies the input signal twofold similarly to the first amplifier circuit.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 11, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryuta OKAMOTO
  • Patent number: 8625099
    Abstract: A particle concentration measuring device includes: a measurement region formation part which has a wall (10) of substantially ring-form and through an inner opening of which gas relatively flows orthogonally; a light curtain forming unit (12A, 12B) forming a planar light curtain (FL) in the inner opening: a particle detecting unit (15) receiving scattered light from particles passing through the light curtain (FL) to detect the particles; and a calculating unit (22) calculating particle concentration based on the total number of the particles detected by the particle detecting unit (15) in a volume of an airflow passing through the light curtain (FL) in a unit time.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: January 7, 2014
    Assignee: Shin Nippon Air Technologies Co., Ltd.
    Inventors: Kazuhiko Sakamoto, Hiroshi Kawakita, Hiroyuki Okami, Yusuke Iso, Ryuta Okamoto
  • Patent number: 8531591
    Abstract: A power supply voltage containing a noise component is supplied to each pixel at the time of sampling of a reset level of a signal read out from each pixel, and a power supply voltage in which the noise component is suppressed is supplied to each pixel at the time of sampling of a read level of the signal read out from each pixel.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: September 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Okamoto, Kazumasa Sanada
  • Patent number: 8179467
    Abstract: In a first signal conversion circuit, a first electrode of a first capacitor is connected to a first signal line, and a second electrode thereof is connected to a first node. In a second capacitor, a third electrode thereof is connected to a second signal line, and a fourth electrode thereof is connected to a second node. In a first inverting amplifier including a first negative feedback switch, a first input electrode is connected to the first node, and a first output electrode is connected to a third node. In a second inverting amplifier including a second negative feedback switch, a second input electrode is connected to the second node. A first averaging switch is connected between a first node and second node. A second averaging switch is connected between third node and fourth node.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: May 15, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Ryuta Okamoto
  • Patent number: 8174422
    Abstract: A reference voltage generation circuit generates a reference voltage and outputs it to an amplifier reference voltage line. A power-supply-noise adding circuit adds power supply noise superimposed on a power supply to the reference voltage generated by the reference voltage generation circuit. A differential amplifier amplifies a difference between a voltage of a vertical signal line and a voltage of an amplifier reference voltage line and outputs the amplified voltage.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: May 8, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Okamoto, Toshikazu Oda
  • Publication number: 20110304850
    Abstract: A particle concentration measuring device includes: a measurement region formation part which has a wall (10) of substantially ring-form and through an inner opening of which gas relatively flows orthogonally; a light curtain forming unit (12A, 12B) forming a planar light curtain (FL) in the inner opening: a particle detecting unit (15) receiving scattered light from particles passing through the light curtain (FL) to detect the particles; and a calculating unit (22) calculating particle concentration based on the total number of the particles detected by the particle detecting unit (15) in a volume of an airflow passing through the light curtain (FL) in a unit time.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 15, 2011
    Inventors: Kazuhiko SAKAMOTO, Hiroshi Kawakita, Hiroyuki Okami, Yusuke Iso, Ryuta Okamoto
  • Publication number: 20100259430
    Abstract: A reference voltage generation circuit generates a reference voltage and outputs it to an amplifier reference voltage line. A power-supply-noise adding circuit adds power supply noise superimposed on a power supply to the reference voltage generated by the reference voltage generation circuit. A differential amplifier amplifies a difference between a voltage of a vertical signal line and a voltage of an amplifier reference voltage line and outputs the amplified voltage.
    Type: Application
    Filed: March 19, 2010
    Publication date: October 14, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuta OKAMOTO, Toshikazu Oda
  • Publication number: 20100238336
    Abstract: A power supply voltage containing a noise component is supplied to each pixel at the time of sampling of a reset level of a signal read out from each pixel, and a power supply voltage in which the noise component is suppressed is supplied to each pixel at the time of sampling of a read level of the signal read out from each pixel.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 23, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Okamoto, Kazumasa Sanada
  • Publication number: 20100060767
    Abstract: In a first signal conversion circuit, a first electrode of a first capacitor is connected to a first signal line, and a second electrode thereof is connected to a first node. In a second capacitor, a third electrode thereof is connected to a second signal line, and a fourth electrode thereof is connected to a second node. In a first inverting amplifier including a first negative feedback switch, a first input electrode is connected to the first node, and a first output electrode is connected to a third node. In a second inverting amplifier including a second negative feedback switch, a second input electrode is connected to the second node. A first averaging switch is connected between a first node and second node. A second averaging switch is connected between third node and fourth node.
    Type: Application
    Filed: September 8, 2009
    Publication date: March 11, 2010
    Inventor: Ryuta OKAMOTO
  • Patent number: 7586523
    Abstract: A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: September 8, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Ryuta Okamoto, Shinji Ohsawa, Hiroshige Goto
  • Publication number: 20070097240
    Abstract: A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 3, 2007
    Inventors: Yoshitaka Egawa, Ryuta Okamoto, Shinji Ohsawa, Hiroshige Goto
  • Patent number: 6784719
    Abstract: A level shift circuit encompasses a first transmission circuit configured to transmit a leading edge of an input signal, a second transmission circuit configured to transmit a trailing edge of the input signal, and a composite circuit configured to generate an output signal by synthesizing the leading edge and the trailing edge.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 31, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuta Okamoto, Kyoichi Takenaka, Akihiko Yoshizawa
  • Publication number: 20030137336
    Abstract: A level shift circuit encompasses a first transmission circuit configured to transmit a leading edge of an input signal, a second transmission circuit configured to transmit a trailing edge of the input signal, and a composite circuit configured to generate an output signal by synthesizing the leading edge and the trailing edge.
    Type: Application
    Filed: December 18, 2002
    Publication date: July 24, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuta Okamoto, Kyoichi Takenaka, Akihiko Yoshizawa