Patents by Inventor Ryutaro Horita
Ryutaro Horita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7430085Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: August 22, 2006Date of Patent: September 30, 2008Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventors: Motoyasu Tsunoda, Yukie Miyazawa, legal representative, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Shoichi Miyazawa
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Publication number: 20060285238Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: ApplicationFiled: August 22, 2006Publication date: December 21, 2006Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Yukie Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
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Patent number: 7139143Abstract: A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: March 17, 2003Date of Patent: November 21, 2006Assignee: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Yukie Miyazawa, legal representative, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Shoichi Miyazawa, deceased
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Publication number: 20030179479Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: ApplicationFiled: March 17, 2003Publication date: September 25, 2003Applicant: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Yukie Miyazawa
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Patent number: 6563656Abstract: A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: July 23, 2002Date of Patent: May 13, 2003Assignee: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
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Publication number: 20020196570Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: ApplicationFiled: July 23, 2002Publication date: December 26, 2002Applicant: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Yukie Miyazawa
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Patent number: 6445522Abstract: A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitalized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: November 21, 2000Date of Patent: September 3, 2002Assignee: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
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Publication number: 20020003675Abstract: A magnetic storage apparatus is provided with unit for identifying the frequency of overwriting storage at the time of overwriting in the same data sector, and depending on the frequency of overwriting, a code for coding or a scrambler initial value is changed at every overwrite operation. The modulation code has the same code rate so that a data length does not change at every write operation. A number corresponding to the present modulation code of each data sector is stored on a memory, and the aforesaid number is also written as an additional bit in the data sector on a medium. Data are read only when the modulation coding number on the memory and the modulation coding number on the medium, which are compared, agree with each other. If they do not agree, offset reading is performed until they agree, and then the read operation is performed.Type: ApplicationFiled: March 19, 2001Publication date: January 10, 2002Applicant: Hitachi, Ltd.Inventors: Futoshi Tomiyama, Hitoshi Yoshida, Ryutaro Horita, Hideki Sawaguchi
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Publication number: 20010033444Abstract: A magnetic storage apparatus is provided with unit for identifying the frequency of overwriting storage at the time of overwriting in the same data sector, and depending on the frequency of overwriting, a code for coding or a scrambler initial value is changed at every overwrite operation. The modulation code has the same code rate so that a data length does not change at every write operation. A number corresponding to the present modulation code of each data sector is stored on a memory, and the aforesaid number is also written as an additional bit in the data sector on a medium. Data are read only when the modulation coding number on the memory and the modulation coding number on the medium, which are compared, agree with each other. If they do not agree, offset reading is performed until they agree, and then the read operation is performed.Type: ApplicationFiled: March 16, 2001Publication date: October 25, 2001Applicant: Hitachi, Ltd.Inventors: Futoshi Tomiyama, Hitoshi Yoshida, Ryutaro Horita, Hideki Sawaguchi
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Patent number: 6266200Abstract: A magnetic disk storage apparatus having a magnetic disk-type storage medium; a head for reading data recorded on the magnetic disk-type storage medium, a processor, a phase synchronizing circuit having a controllable response characteristic and for outputting a clock signal to handle the data read from the magnetic disk-type storage medium, and a memory for storing information to control the response characteristic of the phase synchronizing circuit previously set in accordance with an access position on the magnetic disk-type storage medium.Type: GrantFiled: November 12, 1999Date of Patent: July 24, 2001Assignee: Hitachi, LtdInventors: Kenichi Hase, Syoichi Miyazawa, Ryutaro Horita, Shinichi Kojima, Akihiko Hirano, Akira Uragami
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Patent number: 6172828Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitalizes in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.Type: GrantFiled: May 15, 1997Date of Patent: January 9, 2001Assignee: Hitachi, Ltd.Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
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Patent number: 5999353Abstract: A magnetic disk storage apparatus provides with a phase locked loop or a phase sync circuit including a phase comparator, a charge pump, a filter and a voltage-controlled oscillator. The phase sync circuit includes a register which is connected to an information processing system and adapted to store therein the response characteristics of the phase comparator, the charge pump, the filter and the voltage-controlled oscillator as instructed from the information processing system. In this way, in accordance with the information on the response characteristics from the information processing system, the phase sync circuit is controlled thereby to assure a stable operation even in the case of the data transfer speed varying between inner and outer track such as occurs in a magnetic disk.Type: GrantFiled: April 9, 1997Date of Patent: December 7, 1999Assignee: Hitachi, Ltd.Inventors: Kenichi Hase, Syoichi Miyazawa, Ryutaro Horita, Shinichi Kojima, Akihiko Hirano, Akira Uragami
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Patent number: 5937020Abstract: Digital information including a sync data field and a user data field subsequent thereto is read from a storage media as a digital information signal in an analog signal format. The obtained signal is sampled according to a clock signal and is thereby transformed into a digital information signal in a digital format. In the sync data field, the clock signal is synchronized with the digital information signal by an analog PLL circuit. Thereafter, in the user data field, the clock signal is synchronized with the digital information signal by a digital PLL circuit.Type: GrantFiled: September 25, 1996Date of Patent: August 10, 1999Assignee: Hitachi, Ltd.Inventors: Kenichi Hase, Ryutaro Horita, Tsuguyoshi Hirooka, Haruto Katsu, Takashi Nara, Shoichi Miyazawa, deceased, Shintaro Suzumura
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Patent number: 5878097Abstract: A signal processing delay circuit is fabricated as a semiconductor integration circuit to cope with increase in the data transfer speed and data recording and reproducing density on a recording medium. In the delay circuit, the amount of delay of a reference delay circuit of a delay PLL is controlled to take a fixed value independent of deviation in quality of the semiconductor circuit, change in power, and alteration in temperature. A control signal supervising the delay amount of the reference delay circuit is employed to control amounts of delay of input signals supplied to a window adjustment delay circuit of a window adjustment circuit and a T/2 generation delay circuit generating a synchronizing signal. Each of these delay circuits includes an analog variable delay circuit having the same configuration. The window adjustment delay circuit is supervised by a signal obtained by weighting the control signal by a D/A converter.Type: GrantFiled: May 30, 1997Date of Patent: March 2, 1999Assignee: Hitachi, Ltd.Inventors: Kenichi Hase, Ryutaro Horita, Kunio Watanabe, Yoshiteru Ishida, Takashi Nara, Hiroshi Kimura
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Patent number: 5745066Abstract: The present invention provides an AD converter which operates at high speed with low power consumption and a magnetic recording/regenerating apparatus using it.The magnetic recording/regenerating apparatus has a current controller for switching the operating current of the comparator of the AD converter and an ADC controller for receiving an instruction of the conversion speed corresponding to the regenerating frequency. When the current controller receives an instruction for decreasing the conversion speed, it puts the operation state of the AD converter into the low power consumption state.Type: GrantFiled: September 13, 1996Date of Patent: April 28, 1998Assignee: Hitachi, Ltd.Inventors: Tsuguyoshi Hirooka, Shoichi Miyazawa, Ryutaro Horita, Terumi Takashi, Akira Uragami
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Patent number: 5636254Abstract: A signal processing delay circuit is fabricated as a semiconductor integration circuit to cope with increase in the data transfer speed and data recording and reproducing density on a recording medium. In the delay circuit, the amount of delay of a reference delay circuit of a delay PLL is controlled to take a fixed value independent of deviation in quality of the semiconductor circuit, change in power, and alteration in temperature. A control signal supervising the delay amount of the reference delay circuit is employed to control amounts of delay of input signals supplied to a window adjustment delay circuit of a window adjustment circuit and a T/2 generation delay circuit generating a synchronizing signal. Each of these delay circuits includes an analog variable delay circuit having the same configuration. The window adjustment delay circuit is supervised by a signal obtained by weighting the control signal by a D/A converter.Type: GrantFiled: April 25, 1995Date of Patent: June 3, 1997Assignee: Hitachi, Ltd.Inventors: Kenichi Hase, Ryutaro Horita, Kunio Watanabe, Yoshiteru Ishida, Takashi Nara, Hiroshi Kimura
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Magnetic disk storage apparatus with phase sync circuit having controllable response characteristics
Patent number: 5633766Abstract: A magnetic disk storage apparatus provides with a phase locked loop or a phase sync circuit including a phase comparator, a charge pump, a filter and a voltage-controlled oscillator. The phase sync circuit includes a register which is connected to an information processing system and adapted to store therein the response characteristics of the phase comparator, the charge pump, the filter and the voltage-controlled oscillator as instructed from the information processing system. In this way, in accordance with the information on the response characteristics from the information processing system, the phase sync circuit is controlled thereby to assure a stable operation even in the case of the data transfer speed varying between inner and outer track such as occurs in a magnetic disk.Type: GrantFiled: December 21, 1994Date of Patent: May 27, 1997Assignee: Hitachi, Ltd.Inventors: Kenichi Hase, Syoichi Miyazawa, Ryutaro Horita, Shinichi Kojima, Akihiko Hirano, Akira Uragami -
Patent number: 5572163Abstract: An active filter control apparatus for controlling or tuning an active filter having a variable cut-off frequency. The active filter control apparatus includes a control circuit for controlling or tuning the cut-off frequency of the active filter and a characteristic correction generator for generating a correction signal to correct a group delay characteristic of the active filter in accordance with a set cut-off frequency. The characteristic correction includes a correction signal generator for generating the correction signal in accordance with a set correction amount. The cut-off frequency controller controls tunes the characteristic of the active filter in accordance with the correction signal. Preferably, the apparatus is formed of a one-chip LSI integrated on one chip. The control apparatus can be utilized to control the speed in a recording/reproducing apparatus such as a optical disk drive or a magnetic tape drive apparatus.Type: GrantFiled: December 23, 1994Date of Patent: November 5, 1996Assignee: Hitachi, Ltd.Inventors: Hiroshi Kimura, Ryutaro Horita, Kenichi Hase, Kunio Watanabe, Takashi Nara
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Patent number: 5559645Abstract: In a signal processing unit for writing/reading data on/from a disk-shaped recording medium of a disk apparatus, all of a data separator, a code decoder circuit, a code encoder and a write compensation circuit are constructed on a one-chip integrated circuit. The data separator separates a synchronization clock from a code data reproduced from the disk. The code decoder circuit produces decoded data from the synchronization clock as the output from the data separator, and synchronized code data. The code encoder encodes data supplied from a host computer or a disk controller into code data. The write compensation circuit compensates for a peak shift with respect to write code data. This integrated circuit is fabricated by a Bipolar-CMOS process by which a bipolar transistor and a CMOS transistor are mixed with each other thereon.Type: GrantFiled: March 23, 1994Date of Patent: September 24, 1996Assignee: Hitachi, Ltd.Inventors: Shyoichi Miyazawa, Ryutaro Horita, Kenichi Hase, Satoshi Kawamura, Shinichi Kojima, Toshiyuki Iseki
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Patent number: 5557274Abstract: The present invention provides an AD converter which operates at high speed with low power consumption and a magnetic recording/regenerating apparatus using the same. The magnetic recording/regenerating apparatus has a current controller for switching the operating current of the comparator of the AD converter and an ADC controller for receiving an instruction of the conversion speed corresponding to the regenerating frequency. When the current controller receives an instruction for decreasing the conversion speed, it puts an operation state of the AD converter into a low power consumption state.Type: GrantFiled: June 3, 1994Date of Patent: September 17, 1996Assignee: Hitachi, Ltd.Inventors: Tsuguyoshi Hirooka, Shoichi Miyazawa, Ryutaro Horita, Terumi Takashi, Akira Uragami