Patents by Inventor Ryutaro Tsuchiya

Ryutaro Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210344864
    Abstract: Each of a plurality of cells includes at least one avalanche photodiode. A light projecting unit is arranged to project light having a cross-sectional shape whose longitudinal direction corresponds to a first direction. The light projecting unit is arranged to scan the light along a second direction intersecting the first direction such that the reflected light is incident on, among N cell groups each of which includes M cells aligned in a row direction, each cell group or each plurality of cell groups. A controller is arranged to apply, in accordance with the incidence of the reflected light, a bias voltage that makes the avalanche photodiode operate in a Geiger mode to each cell group or each plurality of cell groups, and is arranged to read signals from cells included in the cell group or the plurality of cell groups to which the bias voltage has been applied.
    Type: Application
    Filed: June 6, 2019
    Publication date: November 4, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya IWASHINA, Shunsuke ADACHI, Shigeyuki NAKAMURA, Terumasa NAGANO, Ryutaro TSUCHIYA
  • Publication number: 20210296387
    Abstract: A semiconductor substrate has a first main surface and a second main surface that oppose each other and a plurality of cells that are arrayed two-dimensionally in a matrix. Each cell includes at least one avalanche photodiode arranged to operate in a Geiger mode. A trench penetrating through the semiconductor substrate is formed in the semiconductor substrate to surround each cell when viewed in a direction orthogonal to the first main surface. A light-shielding member optically separates mutually adjacent cells of the plurality of cells. The light-shielding member includes a first portion extending in a thickness direction of the semiconductor substrate between an opening end of the trench at the first main surface and an opening end of the trench at the second main surface and a second portion projecting out from the second main surface. The insulating film includes a portion that covers the second portion.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 23, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryutaro TSUCHIYA, Terumasa NAGANO, Takashi BABA
  • Patent number: 11101315
    Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: August 24, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 10944016
    Abstract: An optical detection unit includes a first wiring substrate that has a first main surface, a plurality of optical detection chips that each have a light receiving surface and a rear surface on a side opposite to the light receiving surface and are two-dimensionally arranged on the first main surface, a first bump electrode that electrically connects the optical detection chip to the first wiring substrate, a light transmitting portion that is provided on the light receiving surface, and a light shielding portion that has light reflection properties or light absorption properties. The optical detection chip includes a Geiger-mode APD and is mounted on the first wiring substrate by the first bump electrode in a state in which the rear surface faces the first main surface.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: March 9, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryutaro Tsuchiya, Terumasa Nagano, Yuta Tsuji, Go Kawai, Yuki Okuwa
  • Patent number: 10879303
    Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: December 29, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 10840294
    Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: November 17, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20190181275
    Abstract: An optical detection unit includes a first wiring substrate that has a first main surface, a plurality of optical detection chips that each have a light receiving surface and a rear surface on a side opposite to the light receiving surface and are two-dimensionally arranged on the first main surface, a first bump electrode that electrically connects the optical detection chip to the first wiring substrate, a light transmitting portion that is provided on the light receiving surface, and a light shielding portion that has light reflection properties or light absorption properties. The optical detection chip includes a Geiger-mode APD and is mounted on the first wiring substrate by the first bump electrode in a state in which the rear surface faces the first main surface.
    Type: Application
    Filed: May 30, 2017
    Publication date: June 13, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryutaro TSUCHIYA, Terumasa NAGANO, Yuta TSUJI, Go KAWAI, Yuki OKUWA
  • Patent number: 10224361
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: March 5, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 10192923
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: January 29, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20180090535
    Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.
    Type: Application
    Filed: October 12, 2017
    Publication date: March 29, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshimaro FUJII, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
  • Patent number: 9825083
    Abstract: Disclosed is an optical detector in which a boundary line BY defining an edge of a semiconductor region 14 is covered with signal read wiring E3 and a capacitor is configured between the semiconductor region 14 and the signal read wiring E3. High frequency components peak components of a carrier are quickly extracted to the outside via the capacitor, but the signal read wiring E3 covers the boundary line BY so that a semiconductor potential in the vicinity of the boundary line is stabilized and an output signal is stabilized.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: November 21, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa Nagano, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20160322417
    Abstract: Disclosed is an optical detector in which a boundary line BY defining an edge of a semiconductor region 14 is covered with signal read wiring E3 and a capacitor is configured between the semiconductor region 14 and the signal read wiring E3. High frequency components peak components of a carrier are quickly extracted to the outside via the capacitor, but the signal read wiring E3 covers the boundary line BY so that a semiconductor potential in the vicinity of the boundary line is stabilized and an output signal is stabilized.
    Type: Application
    Filed: December 16, 2014
    Publication date: November 3, 2016
    Applicants: HAMAMATSU PHOTONICS K.K., HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa NAGANO, Kenichi SATO, Ryutaro TSUCHIYA
  • Publication number: 20160284744
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 29, 2016
    Inventors: Koei YAMAMOTO, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
  • Publication number: 20160284760
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 29, 2016
    Inventors: Koei YAMAMOTO, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
  • Patent number: 9385155
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: July 5, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20150380457
    Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.
    Type: Application
    Filed: February 19, 2014
    Publication date: December 31, 2015
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshimaro FUJII, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
  • Publication number: 20140306314
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Inventors: Koei YAMAMOTO, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
  • Patent number: 8791538
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: July 29, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 8754502
    Abstract: Each light detecting unit includes a semiconductor region that outputs a carrier, and a surface electrode. In a photodiode array, a read wire is positioned between neighboring avalanche photodiodes. When a plane including a surface of the semiconductor region is set as a reference plane, a distance tb from the reference plane to the read wire is larger than a distance to from the reference plane to the surface electrode.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: June 17, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20140117484
    Abstract: Each light detecting unit includes a semiconductor region that outputs a carrier, and a surface electrode. In a photodiode array, a read wire is positioned between neighboring avalanche photodiodes. When a plane including a surface of the semiconductor region is set as a reference plane, a distance tb from the reference plane to the read wire is larger than a distance to from the reference plane to the surface electrode.
    Type: Application
    Filed: December 11, 2012
    Publication date: May 1, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei YAMAMOTO, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA