Patents by Inventor Ryuujin Fumihira

Ryuujin Fumihira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chip scale package in which layout of wiring lines is improved
    Patent number: 6657293
    Abstract: A semiconductor device of the present invention includes: a semiconductor chip having an electrode at a periphery thereof, a wiring board having a first surface and a second surface, the first surface of the wiring board being attached to the semiconductor chip, the board having an opening to expose the electrode of said semiconductor chip, and an external terminal arranged on the second surface of the wiring board and arranged inside of the wiring board compared with the opening. The semiconductor device has a wiring line laid on the second surface of the wiring board to electrically connect the electrode and the external terminal. The wiring line extends outside of said wiring board from the external terminal and detours said opening to reach the electrode.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: December 2, 2003
    Assignees: NEC Corporation, NEC Electronics Corporation
    Inventor: Ryuujin Fumihira