Patents by Inventor Ryuya Kuroda

Ryuya Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7667312
    Abstract: In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate (5) can be interposed between a lower layer semiconductor chip (3) and an upper layer semiconductor chip (4) and connected to a ground wiring of a substrate (2) through a bonding wire (9). A heating transmitting conductive plate (5) at the ground potential can block propagation of noise between the lower layer semiconductor chip (3) and upper layer semiconductor chip (4). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip (4) can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip (3) and upper layer semiconductor chip (4) can be transmitted through contact points with the heat transmitting conductive plate (5) for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device (1) contributing to more stable operation.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: February 23, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Satoko Kawakami, Yoichiro Kurita, Takehiro Kimura, Ryuya Kuroda
  • Patent number: 7435948
    Abstract: To provide a solid-state image sensing device that is capable of improving the connection reliability of bonding pads and bonding wires. A solid-state image sensing element 1 of the present invention contains a long plate-shaped metal substrate 16, a long plate-shaped solid-state image sensing element 4 fixed to the surface of the metal substrate 16 via an adhesive layer 18, and bonding pads 6, formed on the surface of the solid-state image sensing element 4, for electrically connecting to the lead frame via bonding wires 14. The adhesive layer 18 contains a first adhesive layer 18a, and a second adhesive layer 18b of a higher modulus of elasticity than the first adhesive layer 18a, and at the regions directly below the bonding pads 6 provided at both end sections in a longitudinal direction of the solid-state image sensing element 4, the metal substrate 16 and the solid-state image sensing element 4 are fixed via the second adhesive layer 18b.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: October 14, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Hirochika Narita, Ryuya Kuroda
  • Patent number: 7348532
    Abstract: Method of manufacturing a solid-state image-sensing device includes: forming a composite lead frame which is a lead unit separated from a metal substrate surface by connecting a pair of lead frames having rectangular outer frame units, lead units formed integrally with the outer frame units within the frames, and bump units formed at one surface of the outer frame units, via the bump units of the lead frames on surfaces of both ends of the long plate-shaped metal substrate, filling up a gap between the surface of the metal substrate and the lead units with insulating resin, and forming an outer frame body by molding part of the composite lead frame so as to expose the connecting units and the lead unit to the outside, mounting a long plate-shaped solid state image sensing element on the composite lead frame, and cutting off the connecting units exposed to the outside.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: March 25, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Hirochika Narita, Ryuya Kuroda
  • Publication number: 20060261250
    Abstract: To provide a solid-state image sensing device that is capable of improving the connection reliability of bonding pads and bonding wires. A solid-state image sensing element 1 of the present invention contains a long plate-shaped metal substrate 16, a long plate-shaped solid-state image sensing element 4 fixed to the surface of the metal substrate 16 via an adhesive layer 18, and bonding pads 6, formed on the surface of the solid-state image sensing element 4, for electrically connecting to the lead frame via bonding wires 14. The adhesive layer 18 contains a first adhesive layer 18a, and a second adhesive layer 18b of a higher modulus of elasticity than the first adhesive layer 18a, and at the regions directly below the bonding pads 6 provided at both end sections in a longitudinal direction of the solid-state image sensing element 4, the metal substrate 16 and the solid-state image sensing element 4 are fixed via the second adhesive layer 18b.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 23, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hirochika Narita, Ryuya Kuroda
  • Publication number: 20060263942
    Abstract: Method of manufacturing a solid-state image-sensing device includes: forming a composite lead frame which is a lead unit separated from a metal substrate surface by connecting a pair of lead frames having rectangular outer frame units, lead units formed integrally with the outer frame units within the frames, and bump units formed at one surface of the outer frame units, via the bump units of the lead frames on surfaces of both ends of the long plate-shaped metal substrate, filling up a gap between the surface of the metal substrate and the lead units with insulating resin, and forming an outer frame body by molding part of the composite lead frame so as to expose the connecting units and the lead unit to the outside, mounting a long plate-shaped solid state image sensing element on the composite lead frame, and cutting off the connecting units exposed to the outside.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 23, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hirochika Narita, Ryuya Kuroda
  • Publication number: 20040051170
    Abstract: In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate (5) can be interposed between a lower layer semiconductor chip (3) and an upper layer semiconductor chip (4) and connected to a ground wiring of a substrate (2) through a bonding wire (9). A heating transmitting conductive plate (5) at the ground potential can block propagation of noise between the lower layer semiconductor chip (3) and upper layer semiconductor chip (4). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip (4) can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip (3) and upper layer semiconductor chip (4) can be transmitted through contact points with the heat transmitting conductive plate (5) for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device (1) contributing to more stable operation.
    Type: Application
    Filed: September 9, 2003
    Publication date: March 18, 2004
    Inventors: Satoko Kawakami, Yoichiro Kurita, Takehiro Kimura, Ryuya Kuroda