Patents by Inventor Ryuzo Iga
Ryuzo Iga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7701993Abstract: In order to provide excellent device characteristics and enhance fabrication yield and run-to-run reproducibility in a buried device structure using a low mesa on a p-type substrate, a cross sectional configuration before growth of a contact layer of a device, i.e., after growth of an over-cladding layer is flattened so as not to cause a problem in crystal quality of the contact layer. A mesa-stripe stacked body including at least a p-type cladding layer (2), an active layer (4) and an n-type cladding layer (6) is formed on a p-type semiconductor substrate (1), a current-blocking layer (8) is buried in both sides of the stacked body, and an n-type over-cladding layer (9) and an n-type contact layer (10) are disposed on the current-blocking layer (8) and the stacked body. The n-type over-cladding layer (9) is made of a semiconductor crystal having a property for flattening a concavo-convex shape of upper surfaces of the current-blocking layer (8) and the stacked body.Type: GrantFiled: May 26, 2005Date of Patent: April 20, 2010Assignee: Nippon Telegraph and Telephone CorporationInventors: Ryuzo Iga, Yasuhiro Kondo
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Publication number: 20080137703Abstract: In order to provide excellent device characteristics and enhance fabrication yield and run-to-run reproducibility in a buried device structure using a low mesa on a p-type substrate, a cross sectional configuration before growth of a contact layer of a device, i.e., after growth of an over-cladding layer is flattened so as not to cause a problem in crystal quality of the contact layer. A mesa-stripe stacked body including at least a p-type cladding layer (2), an active layer (4) and an n-type cladding layer (6) is formed on a p-type semiconductor substrate (1), a current-blocking layer (8) is buried in both sides of the stacked body, and an n-type over-cladding layer (9) and an n-type contact layer (10) are disposed on the current-blocking layer (8) and the stacked body. The n-type over-cladding layer (9) is made of a semiconductor crystal having a property for flattening a concavo-convex shape of upper surfaces of the current-blocking layer (8) and the stacked body.Type: ApplicationFiled: May 26, 2005Publication date: June 12, 2008Inventors: Ryuzo Iga, Yasuhiro Kondo
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Patent number: 7355778Abstract: A semiconductor optical converter for use principally in an optical communications system or an optical information processing system. The semiconductor optical converter comprises an n-InP clad layer (12), an optical waveguide layer (13), an SI-InP clad layer (14), and an n-InP clad layer (15) formed sequentially on an SI-InP substrate (11), characterized in that a voltage is applied from an electrode (16) connected with the n-InP clad layer (15) and a ground electrode (17) connected with the n-InP clad layer (12). The semiconductor optical converter is especially applicable as a semiconductor phase modulator or a semiconductor Mach-Zehnder phase modulator operating at low voltages and having a low waveguide loss.Type: GrantFiled: March 11, 2004Date of Patent: April 8, 2008Assignee: Nippon Telegraph and Telephone CorporationInventors: Ken Tsuzuki, Tsuyoshi Ito, Ryuzo Iga
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Publication number: 20060159381Abstract: A semiconductor optical converter for use principally in an optical communications system or an optical information processing system. The semiconductor optical converter comprises an n-InP clad layer (12), an optical waveguide layer (13), an SI-InP clad layer (14), and an n-InP clad layer (15) formed sequentially on an SI-INP substrate (11), characterized in that a voltage is applied from an electrode (16) connected with the n-InP clad layer (15) and ground electrode (17) connected with the n-InP clad layer (12). The semiconductor optical converter is especially applicable as a semiconductor phase modulator or a semiconductor Mach-Zehnder phase modulator operating at low voltages and having a low waveguide loss.Type: ApplicationFiled: March 11, 2004Publication date: July 20, 2006Inventors: Ken Tsuzuki, Tsuyoshi Ito, Ryuzo Iga
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Patent number: 7060518Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: GrantFiled: September 30, 2005Date of Patent: June 13, 2006Assignee: Nippon Telegraph and Telephone CorporationInventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Publication number: 20060030065Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: ApplicationFiled: September 30, 2005Publication date: February 9, 2006Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Patent number: 6990131Abstract: A semiconductor optical device includes a multilayer structure and buried layers. The multilayer structure is constituted by a cladding layer having an n-type conductivity, an active region formed from an active layer or photoabsorption layer, and a cladding layer having a p-type conductivity which are successively formed on a semiconductor substrate having the first crystallographic orientation. The buried layers are made of a ruthenium-doped semi-insulating semiconductor crystal and formed on two sides of the mesa-stripe-like multilayer structure.Type: GrantFiled: August 16, 2002Date of Patent: January 24, 2006Assignee: Nippon Telegraph & Telephone CorporationInventors: Ryuzo Iga, Susumu Kondo, Matsuyuki Ogasawara, Yasuhiro Kondo
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Patent number: 6982469Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: GrantFiled: February 9, 2004Date of Patent: January 3, 2006Assignee: Nippon Telegraph and Telephone CorporationInventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Patent number: 6815786Abstract: A semiconductor optical device includes, on a semiconductor substrate, a mesa-stripe-like multilayer structure constituted by at least an n-cladding layer, an active region formed from an active layer or a photoabsorption layer, and a p-cladding layer, and a buried layer in which two sides of the multilayer structured are buried using a semi-insulating semiconductor crystal. The buried layer includes a diffusion enhancement layer which is adjacent to the mesa-stripe-like multilayer structure and enhances diffusion of a p-impurity, and a diffusion suppression layer which is adjacent to the diffusion enhancement layer and suppresses diffusion of a p-impurity. A method of manufacturing a semiconductor optical device is also disclosed.Type: GrantFiled: August 16, 2002Date of Patent: November 9, 2004Assignee: Nippon Telegraph and Telephone CorporationInventors: Matsuyuki Ogasawara, Susumu Kondo, Ryuzo Iga, Yasuhiro Kondo
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Publication number: 20040159847Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: ApplicationFiled: February 9, 2004Publication date: August 19, 2004Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Patent number: 6717187Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: GrantFiled: April 18, 2002Date of Patent: April 6, 2004Assignee: Nippon Telegraph and Telephone CorporationInventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Patent number: 6692837Abstract: A semi-insulating InP substrate in which a Ru-doped semi-insulating semiconductor layer is formed on the surface is provided, wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property. The semiconductor optical device is fabricated by forming the Ru-doped semi-insulating semiconductor layer on a Fe-doped semi-insulating InP substrate, and forming a semiconductor crystal layer to which a p-type impurity is doped.Type: GrantFiled: May 10, 2002Date of Patent: February 17, 2004Assignee: Nippon Telegraph and Telephone CorporationInventors: Ryuzo Iga, Matsuyuki Ogasawara, Susumu Kondo, Yasuhiro Kondo
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Publication number: 20030067010Abstract: A semiconductor optical device includes a multilayer structure and buried layers. The multilayer structure is constituted by a cladding layer having an n-type conductivity, an active region formed from an active layer or photoabsorption layer, and a cladding layer having a p-type conductivity which are successively formed on a semiconductor substrate having the first crystallographic orientation. The buried layers are made of a ruthenium-doped semi-insulating semiconductor crystal and formed on two sides of the mesa-stripe-like multilayer structure.Type: ApplicationFiled: August 16, 2002Publication date: April 10, 2003Inventors: Ryuzo Iga, Susumu Kondo, Matsuyuki Ogasawara, Yasuhiro Kondo
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Publication number: 20030042495Abstract: A semiconductor optical device includes, on a semiconductor substrate, a mesa-stripe-like multilayer structure constituted by at least an n-cladding layer, an active region formed from an active layer or a photoabsorption layer, and a p-cladding layer, and a buried layer in which two sides of the multilayer structured are buried using a semi-insulating semiconductor crystal. The buried layer includes a diffusion enhancement layer which is adjacent to the mesa-stripe-like multilayer structure and enhances diffusion of a p-impurity, and a diffusion suppression layer which is adjacent to the diffusion enhancement layer and suppresses diffusion of a p-impurity. A method of manufacturing a semiconductor optical device is also disclosed.Type: ApplicationFiled: August 16, 2002Publication date: March 6, 2003Inventors: Matsuyuki Ogasawara, Susumu Kondo, Ryuzo Iga, Yasuhiro Kondo
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Publication number: 20020187580Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.Type: ApplicationFiled: April 18, 2002Publication date: December 12, 2002Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
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Publication number: 20020168856Abstract: A semi-insulating InP substrate in which a Ru-doped semi-insulating semiconductor layer is formed on the surface is provided, wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property. The semiconductor optical device is fabricated by forming the Ru-doped semi-insulating semiconductor layer on a Fe-doped semi-insulating InP substrate, and forming a semiconductor crystal layer to which a p-type impurity is doped.Type: ApplicationFiled: May 10, 2002Publication date: November 14, 2002Inventors: Ryuzo Iga, Matsuyuki Ogasawara, Susumu Kondo, Yasuhiro Kondo
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Patent number: 5273932Abstract: The growth rate of a compound semiconductor thin film is freely enhanced or suppressed by establishing a proper temperature of a substrate 10, and by irradiating by an MOMBE technique, portions corresponding to a desired pattern on the substrate 10 with laser rays having an energy lower than that of photon which can directly decompose an organometal during film growth. A compound semiconductor thin film having a fine pattern with complicated unevenness can be formed on the substrate 10. The relative positions of the source 11 of laser rays, the optical systems 12 and 31 for irradiating the substrate with the laser rays, and the substrate 10 in the vacuum chamber 1 are maintained constant by mounting the body 1 of the MOMBE system, the source 11 of the laser rays, and the optical systems 12 and 31 for guiding the laser rays to the body 1 of the MOMBE system on a vibration proof base 30, whereby the formation of a fine pattern becomes possible.Type: GrantFiled: August 25, 1992Date of Patent: December 28, 1993Assignee: Nippon Telegraph & Telephone Corp.Inventors: Hideo Sugiura, Takeshi Yamada, Ryuzo Iga
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Patent number: 5186750Abstract: The growth rate of a compound semiconductor thin film is freely enhanced or suppressed by establishing a proper temperature of a substrate 10, and by irradiating by an MOMBE technique, portions corresponding to a desired pattern on the substrate 10 with laser rays having an energy lower than that of photon which can directly decompose an organometal during film growth. A compound semiconductor thin film having a fine pattern with complicated unevenness can be formed on the substrate 10. The relative positions of the source 11 of laser rays, the optical systems 12 and 31 for irradiating the substrate with the laser rays, and the substrate 10 in the vacuum chamber 1 are maintained constant by mounting the body 1 of the MOMBE system, the source 11 of the laser rays, and the optical system 12 and 31 for guiding the laser rays to the body 1 of the MOMBE system on a vibration proof base 30, whereby the formation of a fine pattern becomes possible.Type: GrantFiled: April 10, 1990Date of Patent: February 16, 1993Assignee: Nippon Telegraph and Telephone CorporationInventors: Hideo Sugiura, Takeshi Yamada, Ryuzo Iga