Patents by Inventor Ryuzo Tagami

Ryuzo Tagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5792683
    Abstract: In a semiconductor device, an undoped polysilicon layer on the uppermost layer is used as a high resistor device without any patterning. A metal wiring layer formed on this high resistor device is connected to a conductive layer formed below the high resistor device via a contact hole extending through the high resistor device. In addition, by oxidizing an end portion, exposed in the contact hole, of the high resistor device, an oxide film is interposed between the high resistor device and the metal wiring layer to attain electrical insulation therebetween. In this manner, the high resistor device is formed of the undoped polysilicon layer by using a multilayered polysilicon structure including the undoped polysilicon layer. Therefore, the integration degree can be increased, and at the same time, a stepped portion accompanying with the multilayered silicon structure is relaxed to improve the flatness of the surface and prevent poor step coverage or bridging of an upper wiring layer.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 11, 1998
    Assignee: NKK Corporation
    Inventors: Taketoshi Hayashi, Ryuzo Tagami
  • Patent number: 5661325
    Abstract: In a semiconductor device, an undoped polysilicon layer on the uppermost layer is used as a resistor having a high resistance without any patterning. A metal wiring layer formed on this resistor is connected to a conductive layer formed below the resistor via a contact hole extending through the high resistor device. In addition, by oxidizing an end portion, exposed in the contact hole, of the resistor, an oxide film is interposed between the high resistor device and the metal wiring layer to attain electrical insulation therebetween. In this manner, the resistor is formed of the undoped polysilicon layer by using a multilayered polysilicon structure including the undoped polysilicon layer. Therefore, the integration degree can be increased, and at the same time, a stepped portion accompanying the multilayered silicon structure is relaxed to improve the flatness of the surface and prevent poor step coverage or bridging of an upper wiring layer.
    Type: Grant
    Filed: July 28, 1995
    Date of Patent: August 26, 1997
    Assignee: NKK Corporation
    Inventors: Taketoshi Hayashi, Ryuzo Tagami